XLH335040.000000I
Public Made by Adomby adom
Renesas XLH335040.000000I XL-family crystal oscillator (XO), 40.000 MHz LVCMOS, 3.3 V, +/-50 ppm, -40 C to +85 C, enable/disable on pin 1, 3.2 x 2.5 mm JX6 6-pad package. KiCad symbol, footprint, Fusion library and 3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownXLH335040.000000I
Renesas Electronics · Crystal oscillators (XO, LVCMOS) · JX6, 3.2 x 2.5 mm, 6 pads (ceramic SMD)
Renesas XLH335040.000000I XL-family crystal oscillator (XO), 40.000 MHz LVCMOS, 3.3 V, +/-50 ppm, -40 C to +85 C, enable/disable on pin 1, 3.2 x 2.5 mm JX6 6-pad package.
Key specifications
| Parameter | Value | Source |
|---|---|---|
| Ordering code decode | XL family / H = LVCMOS, E/D on pin 1 / 3 = 3.2 x 2.5 mm / 3 = 3.3 V +/-5% / 5 = +/-50 ppm / 040.000000 MHz / I = -40 C to +85 C | p.3 Ordering Information (XO), Table 3 |
| Frequency | 40.000000 MHz | p.3 |
| Output | LVCMOS, single-ended (OUT2 not connected) | p.2 Table 1 |
| Supply | 3.3 V +/-5% | p.3 |
| Frequency stability | +/-50 ppm over -40 C to +85 C | p.3 Table 3 |
| Supply current (LVCMOS, 20 to 50 MHz, 3.3 V) | 32 mA typ, 35 mA max | p.7 Table 7 |
| Phase jitter (12 kHz to 20 MHz) | 750 fs to 890 fs typ (family) | p.1 |
| Enable/disable | Pin 1, pulled high internally; low disables the output | p.2 Table 1 |
| Bypass | 0.01 uF between VDD (6) and GND (3) | p.1 |
| Package | JX6 3.2 x 2.5 mm, theta JA 94.7 C/W | p.6 Table 4; PSC-4412 |
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E/D | input | Enable/Disable (H option: E/D on pin 1); pulled high internally; low = output disabled |
| 2 | NC | no_connect | No connect (H option) |
| 3 | GND | power_in | Connect to ground |
| 4 | OUT | output | LVCMOS output, 40.000 MHz. |
| 5 | OUT2 | no_connect | Complementary output - do not connect for LVCMOS (H option) |
| 6 | VDD | power_in | Supply 3.3 V +/-5%; 0.01 uF bypass between VDD (6) and GND (3) |
Source: p.1 Pin Assignments (XO); p.2 Table 1 XO Pin Description; p.3 Ordering Information (XO).
Footprint and pin 1
Pin 1 (E/D) is at the lower left in the top view (as placed on the PCB): pins 1, 2, 3 along the bottom row from left to right, 4, 5, 6 along the top row from right to left (datasheet p.1 pin assignment, PSC-4412 land pattern). The footprint marks it with a silkscreen dot left of pad 1 and a chamfered fab outline.
Land pattern source: PSC-4412 rev 02 'JX6 package outline', sheet 2 'Recommended land pattern dimension' (PDF p.20).
| Dimension | Value (mm) |
|---|---|
| corner pad | 1.30 x 1.00 at x=+-1.30 |
| centre pad | 0.70 x 1.00 at x=0 |
| pad gap x | 0.3 |
| row gap y | 0.9 |
| row centre y | +-0.95 |
| pin1 | bottom-left (top view as on PCB) |
3D models
No manufacturer 3D model was available, so the model is AI-created: built by Adom from the datasheet drawing (PSC-4412 rev 02 sheet 1 (PDF p.19)). It is a simplified body (substrate, shield or lid, and the contact pads), Z-up and seated on z = 0, centred on the footprint origin.
Simplifications and assumptions: No Renesas STEP retrieved; simplified model; Castellation notches not modelled.
| File | What it is |
|---|---|
xlh335040-000000i.step / xlh335040-000000i.glb |
Plain model |
xlh335040-000000i-etched.step / xlh335040-000000i-etched.glb |
The same model with the MPN as a virtual laser mark (top face, adom-aiflow-etch, gate PASS). This is the board/library model. |
xlh335040-000000i-hero.glb |
The page's 3D view: the marked model plus teal dashed pad outlines, silkscreen with pin 1 and signal names (adom-hero 1.4). Not for boards. |
The MPN mark is an identification aid added by Adom, not a claim about the manufacturer's real marking.
Sourcing
| Distributor | Part number |
|---|---|
| Mouser | 972-LH335040.000000I |
| DigiKey | 6690-XLH335040.000000I-ND |
| LCSC | not listed |
Snapshot 2026-10-17 (adom-parts-search): Mouser 972-LH335040.000000I: 1,546 in stock, USD 1.52 (1 pc), USD 1.13 (100). DigiKey 6690-XLH335040.000000I-ND (marketplace listing): 0 in stock. LCSC: not listed.
Manufacturer and resources
- XL Family of Low Phase Noise Quartz-based PLL Oscillators datasheet (rev. March 2, 2022), with package drawing PSC-4412 rev 02 (JX6)
- Renesas XL family product page
Manufacturer documents are linked, not copied: their terms do not allow redistribution.
Provenance
| File | Classification | Source |
|---|---|---|
xlh335040-000000i.kicad_sym |
source-derived | p.1 Pin Assignments (XO); p.2 Table 1 XO Pin Description; p.3 Ordering Information (XO) |
xlh335040-000000i.kicad_mod |
source-derived | PSC-4412 rev 02 'JX6 package outline', sheet 2 'Recommended land pattern dimension' (PDF p.20) |
xlh335040-000000i.step |
AI-created | PSC-4412 rev 02 sheet 1 (PDF p.19) |
xlh335040-000000i-etched.step |
derived (virtual MPN mark added) | xlh335040-000000i.step |
xlh335040-000000i.glb |
derived (format conversion) | xlh335040-000000i.step |
xlh335040-000000i-etched.glb |
derived (format conversion) | xlh335040-000000i-etched.step |
xlh335040-000000i-hero.glb |
derived (annotated presentation model, not for board use) | xlh335040-000000i-etched.glb, xlh335040-000000i.kicad_mod, page.json component.pins |
xlh335040-000000i.lbr |
derived | xlh335040-000000i.kicad_sym, xlh335040-000000i.kicad_mod |
Every file's SHA-256, the source documents with their hashes and retrieval dates, the dimensions used and the assumptions are in provenance/provenance.json. The MPN mark plan and gate result are in provenance/.
Found a wrong pin, pad or dimension? Open an issue on this page with the file name and hash, the disputed value, the source page and a screenshot.
License
Adom-authored files: CC BY-SA 4.0. See LICENSE.