component
XL74LS27
Public Made by Adomby adom
XINLUDA Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXL74LS27
XINLUDA · Gates · SOIC-14
XL74LS27 from XINLUDA, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 2 | 1B | input | Gate 1 input B of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 3 | 2A | input | Gate 2 input A of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 4 | 2B | input | Gate 2 input B of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 5 | 2C | input | Gate 2 input C of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 6 | 2Y | output | Gate 2 NOR output, rated for IOH -0.4 mA and IOL 8 mA. |
| 7 | GND | power_in | Ground reference for the device; all voltage values are with respect to this network ground terminal. |
| 8 | 3Y | output | Gate 3 NOR output, rated for IOH -0.4 mA and IOL 8 mA. |
| 9 | 3A | input | Gate 3 input A of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 10 | 3B | input | Gate 3 input B of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 11 | 3C | input | Gate 3 input C of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 12 | 1Y | output | Gate 1 NOR output, rated for IOH -0.4 mA and IOL 8 mA. |
| 13 | 1C | input | Gate 1 input C of the 3-input NOR gate, with VIH min 2 V, VIL max 0.8 V and 7 V absolute maximum input voltage. |
| 14 | VCC | power_in | Positive supply pin, recommended 4.75 V to 5.25 V (5 V nominal) with 7 V absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
XL74LS27 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
xl74ls27-etched.step/xl74ls27-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xl74ls27.step/xl74ls27.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (6 pp, sha256
9157631339d69233, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).