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XL74LS148

Public Made by Adom

by adom

XINLUDA Signal Switches, Multiplexers, Decoders, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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XL74LS148

XINLUDA · Signal Switches, Multiplexers, Decoders · SOP-16

XL74LS148 from XINLUDA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 4 input Active-low data input 4 of the eight-line priority encoder.
2 5 input Active-low data input 5 of the eight-line priority encoder.
3 6 input Active-low data input 6 of the eight-line priority encoder.
4 7 input Active-low data input 7, the highest-priority data line.
5 EI input Enable input for cascading; active low, and a high level forces all outputs inactive.
6 A2 output Active-low binary address output A2 (most significant bit) of the encoded input.
7 A1 output Active-low binary address output A1 of the encoded input.
8 GND power_in Ground terminal, the reference for all voltages.
9 A0 output Active-low binary address output A0 (least significant bit) of the encoded input.
10 0 input Active-low data input 0, the lowest-priority data line.
11 1 input Active-low data input 1 of the eight-line priority encoder.
12 2 input Active-low data input 2 of the eight-line priority encoder.
13 3 input Active-low data input 3 of the eight-line priority encoder.
14 GS output Active-low group select output, low when EI is low and any data input is active.
15 EO output Active-low enable output for cascading, low when EI is low and all data inputs are high.
16 VCC power_in Supply voltage, recommended 4.75 V to 5.25 V (7 V absolute maximum).

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 7
High-level output current IOH -400 mA 7
Low-level output current IOL 8 mA 7
Operating free-air temperature TA 0 70 °C 7
Supply voltage VCC 7 V see Note 1 6
Input voltage (74LS148) VI 7 V 6
Operating free-air temperature range, SOP package TA 0 70 °C 6
Storage temperature range Tstg -65 150 °C 6
High-level input voltage VIH 2 V 7
Low-level input voltage VIL 0.8 V 7
Input clamp voltage VIK -1.5 V VCC = MIN, II = −18 mA 7
High-level output voltage VOH 2.7 3.4 V VCC = MIN, VIL = 0.8 V, VIH = 2 V, IOH = −400 µA 7
Low-level output voltage VOL 0.25 0.4 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 4 mA 7
Low-level output voltage VOL 0.35 0.5 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 8 mA 7
Input current at maximum input voltage II 0.2 mA VCC = MAX, VI = 7 V, 'LS148 inputs 1-7 7
Input current at maximum input voltage II 0.1 mA VCC = MAX, VI = 7 V, all other inputs 7
High-level input current IIH 40 µA VCC = MAX, VI = 2.7 V, 'LS148 inputs 1-7 7
High-level input current IIH 20 µA VCC = MAX, VI = 2.7 V, all other inputs 7
Low-level input current IIL -0.8 mA VCC = MAX, VI = 0.4 V, 'LS148 inputs 1-7 7
Low-level input current IIL -0.4 mA VCC = MAX, VI = 0.4 V, all other inputs 7
Short-circuit output current IOS -20 -100 mA VCC = MAX 7
Supply current ICC 12 20 mA VCC = MAX, Condition 1 7
Supply current ICC 10 17 mA VCC = MAX, Condition 2 7
Propagation delay, 1-7 to A0/A1/A2, in-phase output tPLH 14 18 ns 8
Propagation delay, 1-7 to A0/A1/A2, in-phase output tPHL 15 25 ns 8
Propagation delay, 1-7 to A0/A1/A2, out-of-phase output tPLH 20 36 ns 8
Propagation delay, 1-7 to A0/A1/A2, out-of-phase output tPHL 16 29 ns 8
Propagation delay, 0-7 to EO, out-of-phase output tPLH 7 18 ns 8
Propagation delay, 0-7 to EO, out-of-phase output tPHL 25 40 ns 8
Propagation delay, 0-7 to GS, in-phase output tPLH 35 55 ns 8
Propagation delay, 0-7 to GS, in-phase output tPHL 9 21 ns 8
Propagation delay, EI to A0/A1/A2, in-phase output tPLH 16 25 ns 8
Propagation delay, EI to A0/A1/A2, in-phase output tPHL 12 25 ns 8
Propagation delay, EI to GS, in-phase output tPLH 12 17 ns 8
Propagation delay, EI to GS, in-phase output tPHL 14 36 ns 8
Propagation delay, EI to EO, in-phase output tPLH 12 21 ns 8
Propagation delay, EI to EO, in-phase output tPHL 23 35 ns 8

CAD (KiCad official)

  • Symbol: XL74LS148
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: xl74ls148-etched.step / xl74ls148-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl74ls148.step / xl74ls148.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (11 pp, sha256 a4113bfa7323e002, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF