XL74LS08

@@ -0,0 +1,56 @@+# XL74LS08++**XINLUDA** · Gates · SOP-14++XL74LS08 from XINLUDA, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Gate 1, input A. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 2 | 1B | input | Gate 1, input B. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 3 | 1Y | output | Gate 1 output. Y = 1A AND 1B. IOH = -0.4 mA, IOL = 8 mA. |+| 4 | 2A | input | Gate 2, input A. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 5 | 2B | input | Gate 2, input B. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 6 | 2Y | output | Gate 2 output. Y = 2A AND 2B. IOH = -0.4 mA, IOL = 8 mA. |+| 7 | GND | power_in | Ground reference (0 V). |+| 8 | 3Y | output | Gate 3 output. Y = 3A AND 3B. IOH = -0.4 mA, IOL = 8 mA. |+| 9 | 3A | input | Gate 3, input A. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 10 | 3B | input | Gate 3, input B. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 11 | 4Y | output | Gate 4 output. Y = 4A AND 4B. IOH = -0.4 mA, IOL = 8 mA. |+| 12 | 4A | input | Gate 4, input A. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 13 | 4B | input | Gate 4, input B. TTL-compatible logic input (VIH ≥ 2 V, VIL ≤ 0.8 V). |+| 14 | VCC | power_in | Positive supply voltage. Recommended 4.75-5.25 V (5 V nominal), absolute max 7 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | XINLUDA |+| Package | SOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `XL74LS08`+- `XL74LS08XD74LS08`++## CAD (KiCad official)++- Symbol: `XL74LS08`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [XINLUDA datasheet](docs/xl74ls08-datasheet.pdf) (5 pp, sha256 `e46ba5a1c45d414d`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/xl74ls08-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "xl74ls08",+  "version": "0.1.0",+  "type": "component",+  "description": "XINLUDA Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "xl74ls08"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "xl74ls08.kicad_sym",+    "xl74ls08.kicad_mod",+    "xl74ls08.glb",+    "xl74ls08.step",+    "xl74ls08.lbr",+    "docs/hero.png",+    "docs/xl74ls08-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file