component
XL74HC595
Public Made by Adomby adom
XINLUDA Shifting Register, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "xl74hc595",+ "title": "XL74HC595",+ "brief": "XINLUDA Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "XINLUDA Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "xl74hc595" ],+ "component": {+ "mpn": "XL74HC595",+ "manufacturer": "XINLUDA",+ "package": "SOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2403181700_XINLUDA-XL74HC595_C2927048.pdf",+ "parts": {+ "symbol": "xl74hc595.kicad_sym",+ "footprint": "xl74hc595.kicad_mod",+ "model_3d": "xl74hc595.glb",+ "model_3d_step": "xl74hc595.step",+ "lbr": "xl74hc595.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "QB",+ "type": "tri_state",+ "description": "Parallel tri-state output bit B from the 8-bit storage register. Drives up to -6 mA / +6 mA at VCC=4.5V and -7.8 mA / +7.8 mA at VCC=6V."+ },+ {+ "number": "2",+ "name": "QC",+ "type": "tri_state",+ "description": "Parallel tri-state output bit C from the 8-bit storage register. Enabled when G is low."+ },+ {+ "number": "3",+ "name": "QD",+ "type": "tri_state",+ "description": "Parallel tri-state output bit D from the 8-bit storage register. Enabled when G is low."+ },+ {+ "number": "4",+ "name": "QE",+ "type": "tri_state",+ "description": "Parallel tri-state output bit E from the 8-bit storage register. Enabled when G is low."+ },+ {+ "number": "5",+ "name": "QF",+ "type": "tri_state",+ "description": "Parallel tri-state output bit F from the 8-bit storage register. Enabled when G is low."+ },+ {+ "number": "6",+ "name": "QG",+ "type": "tri_state",+ "description": "Parallel tri-state output bit G from the 8-bit storage register. Enabled when G is low."+ },+ {+ "number": "7",+ "name": "QH",+ "type": "tri_state",+ "description": "Parallel tri-state output bit H (MSB) from the 8-bit storage register. Enabled when G is low."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Digital ground reference (0 V)."+ },+ {+ "number": "9",+ "name": "Q'H",+ "type": "output",+ "description": "Serial data output from the shift register (not tri-stated). Used for cascading multiple XL74HC595 devices; connect to SER of the next stage."+ },+ {+ "number": "10",+ "name": "SCLR",+ "type": "input",+ "description": "Shift register clear, active low. When low, the shift register contents are cleared (Q'H = 0). Does not affect the storage register."+ },+ {+ "number": "11",+ "name": "SCK",+ "type": "input",+ "description": "Shift register clock input. Rising edge shifts data from SER into the shift register. Max 30 MHz typical (VCC=6V, up to 108 MHz typ per AC characteristics)."+ },+ {+ "number": "12",+ "name": "RCK",+ "type": "input",+ "description": "Storage register (latch) clock input. Rising edge latches the current shift register contents into the 8-bit storage register, updating QA-QH."+ },+ {+ "number": "13",+ "name": "G",+ "type": "input",+ "description": "Output Enable, active low. When low, QA-QH are driven from the storage register; when high, QA-QH are in high-impedance state. Does not affect Q'H."+ },+ {+ "number": "14",+ "name": "SER",+ "type": "input",+ "description": "Serial data input. Value present at SER is shifted into the shift register on the rising edge of SCK."+ },+ {+ "number": "15",+ "name": "QA",+ "type": "tri_state",+ "description": "Parallel tri-state output bit A (LSB) from the 8-bit storage register. Enabled when G is low."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Digital power supply, 2 V to 6 V (absolute max +7 V). Bypass with a 100 nF ceramic capacitor close to the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2403181700_XINLUDA-XL74HC595_C2927048.pdf",+ "pages": 13,+ "sha256": "e0ba2b7daef7908f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "XINLUDA",+ "Package": "SOP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "xl74hc595"+ ],+ "discovery_pitch": "XL74HC595 (XINLUDA) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/xl74hc595-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }