component
XL74HC165
Public Made by Adomby adom
XINLUDA Shifting Register, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "xl74hc165",+ "title": "XL74HC165",+ "brief": "XINLUDA Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "XINLUDA Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "xl74hc165" ],+ "component": {+ "mpn": "XL74HC165",+ "manufacturer": "XINLUDA",+ "package": "SOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/267946740b91d324e5716dbb9b5ec03e.pdf",+ "parts": {+ "symbol": "xl74hc165.kicad_sym",+ "footprint": "xl74hc165.kicad_mod",+ "model_3d": "xl74hc165.glb",+ "model_3d_step": "xl74hc165.step",+ "lbr": "xl74hc165.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "/PL",+ "type": "input",+ "description": "Asynchronous parallel load input (active LOW). When LOW, data on D0-D7 is loaded into the shift register asynchronously."+ },+ {+ "number": "2",+ "name": "CP",+ "type": "input",+ "description": "Clock input, LOW-to-HIGH edge-triggered. Shifts serial data on rising edges when /CE is LOW and /PL is HIGH."+ },+ {+ "number": "3",+ "name": "D4",+ "type": "input",+ "description": "Parallel data input bit 4. Loaded into the shift register on /PL LOW."+ },+ {+ "number": "4",+ "name": "D5",+ "type": "input",+ "description": "Parallel data input bit 5. Loaded into the shift register on /PL LOW."+ },+ {+ "number": "5",+ "name": "D6",+ "type": "input",+ "description": "Parallel data input bit 6. Loaded into the shift register on /PL LOW."+ },+ {+ "number": "6",+ "name": "D7",+ "type": "input",+ "description": "Parallel data input bit 7 (MSB, appears first at Q7). Loaded into the shift register on /PL LOW."+ },+ {+ "number": "7",+ "name": "/Q7",+ "type": "output",+ "description": "Complementary serial output from the last stage (inverted Q7)."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference, 0 V."+ },+ {+ "number": "9",+ "name": "Q7",+ "type": "output",+ "description": "Serial output from the last stage of the shift register."+ },+ {+ "number": "10",+ "name": "DS",+ "type": "input",+ "description": "Serial data input. Data entering the register serially on each LOW-to-HIGH CP transition when /PL is HIGH and /CE is LOW."+ },+ {+ "number": "11",+ "name": "D0",+ "type": "input",+ "description": "Parallel data input bit 0. Loaded into the shift register on /PL LOW."+ },+ {+ "number": "12",+ "name": "D1",+ "type": "input",+ "description": "Parallel data input bit 1. Loaded into the shift register on /PL LOW."+ },+ {+ "number": "13",+ "name": "D2",+ "type": "input",+ "description": "Parallel data input bit 2. Loaded into the shift register on /PL LOW."+ },+ {+ "number": "14",+ "name": "D3",+ "type": "input",+ "description": "Parallel data input bit 3. Loaded into the shift register on /PL LOW."+ },+ {+ "number": "15",+ "name": "/CE",+ "type": "input",+ "description": "Clock enable input (active LOW). When LOW, CP is enabled; when HIGH, the CP input is disabled (hold)."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage, 2.0 V to 6.0 V (recommended)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/267946740b91d324e5716dbb9b5ec03e.pdf",+ "pages": 13,+ "sha256": "79f2636f72dd59f5",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "XINLUDA",+ "Package": "SOP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "xl74hc165"+ ],+ "discovery_pitch": "XL74HC165 (XINLUDA) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/xl74hc165-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }