component
XL7046E1
Public Made by Adomby adom
XLSEMI DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
xl7046e1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
c88e469
21h ago
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{
"schema_version": 1,
"type": "component",
"slug": "xl7046e1",
"title": "XL7046E1",
"brief": "XLSEMI DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
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"pmic",
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],
"component": {
"mpn": "XL7046E1",
"manufacturer": "XLSEMI",
"package": "ESOP-8",
"pin_count": 9,
"category": "PMIC",
"subcategory": "DC-DC Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/ab2d251cf8f9206256931ba2012474ea.pdf",
"parts": {
"symbol": "xl7046e1.kicad_sym",
"footprint": "xl7046e1.kicad_mod",
"model_3d": "xl7046e1-etched.glb",
"model_3d_plain": "xl7046e1.glb",
"model_3d_step": "xl7046e1-etched.step",
"model_3d_step_plain": "xl7046e1.step",
"lbr": "xl7046e1.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "CSN",
"type": "input",
"description": "Current Sense Negative terminal. Connects to the load-side of the external current-sense resistor R3 (typ. 0.075 Ω for VOUT ≤ 5V, 0.082 Ω for VOUT > 5V) for the internal over-current comparator (OCS)."
},
{
"number": "2",
"name": "CSP",
"type": "input",
"description": "Current Sense Positive terminal. Connects to the SW-side of the external current-sense resistor R3 and pairs with CSN to feed the internal over-current sense amplifier (75 mV threshold)."
},
{
"number": "3",
"name": "VC",
"type": "passive",
"description": "Internal Voltage Regulator Bypass Capacity. In a typical application, VC connects a 1 µF bypass capacitor to VIN to decouple the internal LDO that powers control circuitry."
},
{
"number": "4",
"name": "VIN",
"type": "power_in",
"description": "Supply Voltage Input Pin. Operates from 8V to 80V DC (absolute max 90V). Bypass VIN to GND with a suitably large capacitor (e.g. 47 µF/100V) to eliminate input noise; VIN UVLO ≈ 6V."
},
{
"number": "5",
"name": "SW",
"type": "output",
"description": "Power Switch Output pin. Drain of the internal HV P-channel MOSFET (Rds(on) typ. 270 mΩ) that supplies the inductor/Schottky node. SW is also connected to the Exposed PAD for thermal dissipation."
},
{
"number": "6",
"name": "EN",
"type": "input",
"description": "Enable pin, TTL-compatible. Drive EN high (>2V) to turn the device OFF, drive it low (<1V) or tie to GND to enable the regulator. Floating defaults low (enabled). Abs max 20V."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground pin. Must be placed outside the Schottky-diode-to-output-capacitor ground path so switching current spikes do not induce voltage noise into the XL7046."
},
{
"number": "8",
"name": "FB",
"type": "input",
"description": "Feedback pin. Through an external resistor divider, FB senses the output voltage and regulates it against the internal 1.25V reference (VOUT = 1.25 × (1 + R2/R1))."
},
{
"number": "9",
"name": "EP",
"type": "output",
"description": "Exposed thermal PAD on the bottom of the SOP8-EP package. Electrically connected to SW (switch node) per the datasheet, not to GND. Solder to a copper pour tied to the SW net for thermal relief."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/ab2d251cf8f9206256931ba2012474ea.pdf",
"pages": 12,
"sha256": "bfa135c6ec9c4c7a",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 9,
"described": 9,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "xl7046e1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.55
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "2d6f7e774e8143e3320cbd59eb5be9f3b7864614644e3b072006e1eb05fb7fa6",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "xl7046e1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.55
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "608e8bd436e0827d2cc31cdea9628dec74b05f2f01c62a9248c6c27decba6817",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "XLSEMI",
"Package": "ESOP-8",
"Category": "PMIC",
"Pins": "9"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"xl7046e1"
],
"discovery_pitch": "XL7046E1 (XLSEMI) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"xl7046e1.kicad_sym",
"xl7046e1.kicad_mod",
"xl7046e1.glb",
"xl7046e1.step",
"xl7046e1.lbr",
"docs/hero.png",
"docs/xl7046e1-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"xl7046e1-etched.step"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "XL7046E1",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T14:36:11.813Z"
}