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XL65HVD08P

Public Made by Adom

by adom

XINLUDA RS-485 / RS-422 ICs, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XL65HVD08P

XINLUDA · RS-485 / RS-422 ICs · DIP-8

XL65HVD08P from XINLUDA, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R output Receive data output; the receiver output is high for differential input above -10 mV and low below -200 mV, with absolute receiver output current limited to ±11 mA.
2 RE input Receiver enable, active low; the receiver output is high-impedance when RE is high.
3 DE input Driver enable, active high; the driver outputs A and B are high-impedance when DE is low, and the input voltage range at DE is -0.5 V to VCC + 0.5 V.
4 D input Driver data input; logic low must be at most 0.8 V and logic high at least 2.25 V, with absolute input range -0.5 V to VCC + 0.5 V.
5 GND power_in Local device ground, the reference potential for the device.
6 A bidirectional Driver differential output and receiver differential input (complementary to B); absolute voltage limits are -9 V to 14 V, and it is rated for 16 kV HBM ESD.
7 B bidirectional Driver differential output and receiver differential input (complementary to A); absolute voltage limits are -9 V to 14 V, and it is rated for 16 kV HBM ESD.
8 VCC power_in Supply voltage, recommended 3 V to 5.5 V (absolute maximum 6 V).

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 3 5.5 V 4
Input voltage at any bus terminal (separately or common mode) VI -7 12 V Separately or common mode 4
High-level input voltage, driver, driver enable, and receiver enable inputs VIH 2.25 V Driver, driver enable, and receiver enable inputs 4
Low-level input voltage VIL 0 0.8 4
Differential input voltage VID -12 12 4
High-level output current, driver IOH -60 mA Driver 4
High-level output current, receiver IOH -8 mA Receiver 4
Low-level output current, driver IOL 60 mA Driver 4
Low-level output current, receiver IOL 8 mA Receiver 4
Operating free-air temperature TA -40 85 °C XL65HVD08 4
Supply voltage (absolute maximum) VCC -0.3 6 V 4
Voltage at A or B -9 14 V 4
Input voltage at D, DE, R or RE -0.5 V 4
Voltage input, transient pulse, A and B -25 25 V Through 100 Ω 4
Receiver output current IO -11 11 mA 4
Maximum junction temperature TJ 150 °C 4
Storage temperature TSTG -65 150 °C 4
Driver differential output voltage magnitude /VOD/ 1.5 V RL= 60 Ω, 375 Ω on each output to - 7 V to 12 V, See Figure 7 5
Change in magnitude of driver differential output voltage Δ/VOD/ -0.2 0.2 V RL= 54 Ω 5
Peak-to-peak driver common-mode output voltage VOC(PP) 0.5 V Center of two 27-Ω load resistors, See Figure 8 5
Positive-going receiver differential input voltage threshold VIT+ -10 mV 5
Negative-going receiver differential input voltage threshold VIT- -200 mV 5
Receiver high-level output voltage VOH 2.4 V IOH = -8 mA 5
Receiver low-level output voltage VOL 0.4 V IOL = 8 mA 5
Driver input, driver enable, and receiver enable high-level input current IIH -100 100 µA 5
Driver input, driver enable, and receiver enable low-level input current IIL -100 100 µA 5
Driver short-circuit output current IOS -265 265 mA 7 V < VO < 12 V 5
Bus input current (disabled driver) II 130 µA VI = 12 V 5
Bus input current (disabled driver) II -100 µA VI = -7 V 5
Supply current ICC 10 mA Receiver enabled, driver disabled, no load 5
Supply current ICC 16 mA Driver enabled, receiver disabled, no load 5
Supply current ICC 5 µA Both disabled 5
Driver high-to-low propagation delay time tPHL 18 40 ns RL = 54 Ω, CL = 50 pF, See Figure 9 6
Driver low-to-high propagation delay time tPLH 18 40 ns RL = 54 Ω, CL = 50 pF, See Figure 9 6
Driver 10%-to-90% differential output rise time tr 10 55 ns 6
Driver 90%-to-10% differential output fall time tf 10 55 ns 6
Driver differential output pulse skew, /tPHL - tPLH/ tSK(P) 2.5 6
Driver enable time ten 55 ns Receiver enabled, See Figures 4 and 5 6
Driver enable time ten 6 µs Receiver disabled, See Figures 4 and 5 6
Driver disable time tdis 90 ns Receiver enabled, See Figures 4 and 5 6
Receiver high-to-low propagation delay time tPHL 70 ns 6
Receiver low-to-high propagation delay time tPLH 70 ns 6
Receiver 10%-to-90% differential output rise time tr 5 ns CL = 15 pF, See Figure 12 6
Receiver 90%-to-10% differential output fall time tf 5 ns CL = 15 pF, See Figure 12 6
Receiver differential output pulse skew, /tPHL - tPLH/ tSK(P) 4.5 6
Receiver enable time ten 15 ns Driver enabled, See Figure 13 6
Receiver enable time ten 6 µs Driver disabled, See Figure 14 6
Receiver disable time tdis 20 ns Driver enabled, See Figure 13 6
Receiver hysteresis (VIT+ - VIT-) Vhys 35 mV 5

CAD (KiCad official)

  • Symbol: XL65HVD08P
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: xl65hvd08p-etched.step / xl65hvd08p-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl65hvd08p.step / xl65hvd08p.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (22 pp, sha256 d18a7cc386f1c8fb, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF