XL555

{
  "schema_version": 1,
  "type": "component",
  "slug": "xl555",
  "title": "XL555",
  "brief": "XINLUDA Timers / Clock Oscillators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "rtc",
    "xl555"
  ],
  "component": {
    "mpn": "XL555",
    "manufacturer": "XINLUDA",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "RTC",
    "subcategory": "Timers / Clock Oscillators",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/3bd302d4a447689a6e6038e43b2fa5d5.pdf",
    "parts": {
      "symbol": "xl555.kicad_sym",
      "footprint": "xl555.kicad_mod",
      "model_3d": "xl555-etched.glb",
      "model_3d_plain": "xl555.glb",
      "model_3d_step": "xl555-etched.step",
      "model_3d_step_plain": "xl555.step",
      "lbr": "xl555.lbr"
    },
    "distributor_links": {
      "lcsc": "C521186"
    },
    "pins": [
      {
        "number": "1",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "2",
        "name": "TRIG",
        "type": "input",
        "description": "Trigger input. Start of timing input; when TRIG falls below 1/2 CONT (≈1/3 VDD) the internal flip-flop is set, driving OUT high and opening the DISCH transistor. Input current ≈10 pA typical."
      },
      {
        "number": "3",
        "name": "OUT",
        "type": "output",
        "description": "High-current timer output signal (rail-to-rail CMOS). Sink capability 100 mA (max), source ≈10 mA typical."
      },
      {
        "number": "4",
        "name": "RESET",
        "type": "input",
        "description": "Active-low reset input. Overrides all other inputs: when driven low the flip-flop is reset, OUT goes low and DISCH is pulled low. Typical VRESET ≈1.1 V; tie to VDD if unused."
      },
      {
        "number": "5",
        "name": "CONT",
        "type": "input",
        "description": "Control voltage. Provides access to the internal 2/3 VDD comparator reference node; bypass with a 10 nF capacitor to GND for noise immunity, or drive to modulate the threshold and trigger levels."
      },
      {
        "number": "6",
        "name": "THRES",
        "type": "input",
        "description": "Threshold (end-of-timing) input. When THRES rises above CONT (≈2/3 VDD) the flip-flop is reset, OUT goes low and DISCH is pulled low. Input current ≈10 pA typical."
      },
      {
        "number": "7",
        "name": "DISCH",
        "type": "output",
        "description": "Discharge. Open-collector/open-drain output used to discharge the external timing capacitor. Saturation voltage ≈50 mV at 1 mA; leakage ≈1 nA typical."
      },
      {
        "number": "8",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply, 2 V to 16 V (absolute max 18 V). Typical supply current 120 µA at VDD = 5 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/3bd302d4a447689a6e6038e43b2fa5d5.pdf",
        "pages": 16,
        "sha256": "fde2e26f9d6cb995",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -1.905
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
      "mark": "drawn"
    },
    "models_3d": [
      {
        "file": "xl555.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "xl555-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "59d3ad19a978547e2afbb9503595b11569432871d3ac63f67660a3a509771c6f",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "XINLUDA",
      "Package": "SOP-8",
      "Category": "RTC",
      "Pins": "8"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "xl555"
  ],
  "discovery_pitch": "XL555 (XINLUDA) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "xl555.kicad_sym",
    "xl555.kicad_mod",
    "xl555.glb",
    "xl555.step",
    "xl555.lbr",
    "docs/hero.png",
    "docs/xl555-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "xl555-etched.step"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "XL555",
      "kind": "packaging"
    },
    {
      "mpn": "XL555XD555",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T14:34:39.133Z"
}