# XL555

**XINLUDA** · Timers / Clock Oscillators · SOP-8

XL555 from XINLUDA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference (0 V) for the device. |
| 2 | TRIG | input | Trigger input. Start of timing input; when TRIG falls below 1/2 CONT (≈1/3 VDD) the internal flip-flop is set, driving OUT high and opening the DISCH transistor. Input current ≈10 pA typical. |
| 3 | OUT | output | High-current timer output signal (rail-to-rail CMOS). Sink capability 100 mA (max), source ≈10 mA typical. |
| 4 | RESET | input | Active-low reset input. Overrides all other inputs: when driven low the flip-flop is reset, OUT goes low and DISCH is pulled low. Typical VRESET ≈1.1 V; tie to VDD if unused. |
| 5 | CONT | input | Control voltage. Provides access to the internal 2/3 VDD comparator reference node; bypass with a 10 nF capacitor to GND for noise immunity, or drive to modulate the threshold and trigger levels. |
| 6 | THRES | input | Threshold (end-of-timing) input. When THRES rises above CONT (≈2/3 VDD) the flip-flop is reset, OUT goes low and DISCH is pulled low. Input current ≈10 pA typical. |
| 7 | DISCH | output | Discharge. Open-collector/open-drain output used to discharge the external timing capacitor. Saturation voltage ≈50 mV at 1 mA; leakage ≈1 nA typical. |
| 8 | VDD | power_in | Positive supply, 2 V to 16 V (absolute max 18 V). Typical supply current 120 µA at VDD = 5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | SOP-8 |
| Category | RTC |
| Pins | 8 |

## Ordering variants

Same part, different packaging or reel option.

- `XL555`
- `XL555XD555`

## CAD (KiCad official)

- Symbol: `XL555`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `xl555-etched.step` / `xl555-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xl555.step` / `xl555.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XINLUDA datasheet](docs/xl555-datasheet.pdf) (16 pp, sha256 `fde2e26f9d6cb995`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xl555-datasheet.pdf)