component
XL548
Public Made by Adomby adom
XINLUDA Analog To Digital Converters (ADC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXL548
XINLUDA · Analog To Digital Converters (ADC) · SOP-8
XL548 from XINLUDA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF+ | input | Positive reference voltage input, which must be held within 2.5V≤REF+≤Vcc+0.1. |
| 2 | ANALOGIN | input | Analog signal input that the on-chip sample-and-hold samples for conversion. |
| 3 | REF- | input | Negative reference voltage input, which must be held within -0.1V≤REF-≤2.5V. |
| 4 | GND | power_in | Ground. |
| 5 | CS | input | Chip select input; CS is driven low to start a conversion sequence and must be high (or I/OCLOCK held low for 36 internal clock cycles) to complete it. |
| 6 | DATAOUT | output | Data conversion interface output that carries the serial conversion result, MSB (D7) first. |
| 7 | I/OCLOCK | input | External I/O clock input that shifts the conversion result out and controls the conversion timing; its high and low pulse widths must be at least 190 ns. |
| 8 | VCC | power_in | Supply voltage; the electrical characteristics table gives 3 V to 5.5 V (the features list states 3 V to 6.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | SOP-8 |
| Category | Data Acquisition |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC Supply voltage | VCC | 3 | 5 | 5.5 | V | 3 | |
| VCC end to GND voltage | -0.5 | 6.5 | V | 3 | |||
| All input pins to GND voltage | -0.5 | 6 | V | 3 | |||
| Peak current of all input pins | -20 | 20 | mA | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Operating ambient temperature | -20 | 85 | °C | 3 | |||
| Welding temperature (10 seconds) | 260 | °C | 10 seconds | 3 | |||
| Maximum junction temperature | 150 | °C | 3 | ||||
| High-level output voltage | VOH | 2.4 | V | VCC = 4.5 V, IOH =, 1.6 mA | 3 | ||
| Low-level output voltage | VOL | 0.4 | V | VCC = 4.5 V, IOL = 1.6 mA | 3 | ||
| Low-level output voltage | VOL | 0.1 | V | VCC = 4.5 V to 5.5 V, IOL = 20uA | 3 | ||
| Off-state (high-impedance-state) output current | IOZ | 10 | uA | VO = VCC, CS at VCC | 3 | ||
| Off-state (high-impedance-state) output current | IOZ | -10 | uA | VO = 0, CS at VCC | 3 | ||
| High-level input current | IIH | 0.05 | uA | VI = VCC | 3 | ||
| Low-level input current | IIL | -0.005 | -2.5 | uA | VI = 0 | 3 | |
| Analog input leakage current | ILeakage | 1 | uA | VI = VCC | 3 | ||
| Analog input leakage current | ILeakage | -1 | uA | VI = 0 | 3 | ||
| Maximum static analog | 10 | uA | Vref+ = VCC, Vref, = GND | 3 | |||
| Operating supply current | ICC | 0.8 | 2.5 | mA | CS at 0 V | 3 | |
| Setup time, CS low before first I/O CLOCK | tsu(CS) | 1.425 | us | 3 | |||
| Hold time, CS low after last I/O CLOCK | th(CS) | 0 | ns | 3 | |||
| Pulse duration, I/O CLOCK high | twH | 190 | ns | 3 | |||
| Pulse duration, I/O CLOCK low | twL(I/O) | 190 | ns | 3 | |||
| Transition time | tt(CS) | 10 | ns | 3 |
CAD (KiCad official)
- Symbol:
XL548 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
xl548-etched.step/xl548-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xl548.step/xl548.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (6 pp, sha256
2f78569321076497, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).