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XL494

Public Made by Adom

by adom

XINLUDA AC-DC Controllers And Regulators, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XL494

XINLUDA · AC-DC Controllers And Regulators · SOP-16

XL494 from XINLUDA, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1IN+ input Noninverting input to error amplifier 1; the amplifier input voltage range is -0.3 V to Vcc-2.0 V.
2 1IN- input Inverting input to error amplifier 1; the amplifier input voltage range is -0.3 V to Vcc-2.0 V.
3 FEEDBACK input Input pin for feedback; the feedback current is limited to 0.3 mA maximum.
4 DTC input Dead-time control comparator input, with an input voltage range of 0 V to 5.25 V.
5 CT passive Capacitor terminal used to set the oscillator frequency; recommended timing capacitance is 0.00047 µF to 10 µF (typ. 0.001 µF).
6 RT passive Resistor terminal used to set the oscillator frequency; recommended timing resistance is 1.8 kΩ to 500 kΩ (typ. 30 kΩ).
7 GND power_in Ground.
8 C1 output Collector terminal of BJT output 1; collector output voltage is up to 40 V and collector output current is up to 200 mA per transistor.
9 E1 output Emitter terminal of BJT output 1; rated up to 200 mA per transistor.
10 E2 output Emitter terminal of BJT output 2; rated up to 200 mA per transistor.
11 C2 output Collector terminal of BJT output 2; collector output voltage is up to 40 V and collector output current is up to 200 mA per transistor.
12 VCC power_in Positive supply; recommended 7.0 V to 40 V (typ. 15 V), absolute maximum 40 V.
13 OUTPUT CTRL input Selects single-ended/parallel output or push-pull operation.
14 REF output 5-V reference regulator output (4.75 V to 5.25 V); output current of the reference terminal is limited to 10 mA maximum.
15 2IN- input Inverting input to error amplifier 2; the amplifier input voltage range is -0.3 V to Vcc-2.0 V.
16 2IN+ input Noninverting input to error amplifier 2; the amplifier input voltage range is -0.3 V to Vcc-2.0 V.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-16
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage Vcc 7 40 V Tamb=25℃ 4
Collector output voltage Vc1;Vc2 40 V Tamb=25℃ 4
Collector output current (single transistor) Ic1;Ic2 200 mA Tamb=25℃ 4
Amplifier input voltage Vin -0.3 V Tamb=25℃; upper limit printed as Vcc-2 4
Power consumption PD 500 mW Tamb45℃ 4
Operating ambient temperature Tamb -25 80 ℃ 4
Storage temperature Tstg -55 150 ℃ 4
Supply voltage Vcc 7 15 40 V 4
Collector output voltage Vc1；Vc2 30 40 V 4
Collector output current (single transistor) Ic1；Ic2 200 mA 4
Amplifier input voltage Vin -0.3 V upper limit printed as Vcc-2.0 4
Feedback current Ifb 0.3 mA 4
Output current of the reference terminal Iref 10 mA 4
Timing resistance RT 1.8 30 500 k 4
Timing capacitance CT 0.00047 0.001 10 F 4
Oscillation frequency fosc 1 40 200 kHz 4
Reference voltage Vref 4.75 5 5.25 V Io=1.0mA 5
Reference voltage change with temperature Vref/T 1.3 2.6 % Tamb from MIN to MAX 5
Voltage linearity (line regulation) Reg line 2 25 mV Vcc=7.0V~40V 5
Load adjustment rate (load regulation) Reg load 2 15 mV Io=1.0mA~10mA 5
Short-circuit output current Isc 32 mA Vref=0V，Tamb=25℃ 5
Collector leakage current Ic(off) 2 100 A Vcc=40V; Vce=40V 5
Emitter leakage current Ie(off) -100 A Vcc=40V; Vc=40V; Ve=0V 5
Collector-emitter saturation pressure drop (common emitter) Vc(sat) 1.1 1.3 V Common emitter: Ve=0V; Ic=200mA 5
Collector-emitter saturation pressure drop (emitter following) Ve(sat) 1.5 2.5 V Emitter following: Vc=15V; Ie=-200mA 5
Output control pin current IOCH 0.2 3.5 mA Voc=Vref 5
Output voltage rise time (common emitter) Tr 100 200 ns Common emitter: Test Figure 3 5
Output voltage rise time (emitter following) Tr 100 200 ns Emitterfollowing: Test Figure 4 5
Output voltage drop time (common emitter) Tf 25 100 ns Common emitter: Test Figure 3 5
Output voltage drop time (emitter following) Tf 40 100 ns Emitterfollowing: Test Figure 4 5
Input offset voltage Vio 2 10 mV Vo (pin3)=2.5V 5
Input offset current Iio 5 250 nA Vo (pin3)=2.5V 6
Input bias current IIB 0.1 1 A Vo (pin3)=2.5V 6
Input common-mode voltage range VICR -0.3 V Vcc=7.0V~40V; upper limit printed as Vcc-2.0 6
Open-loop voltage gain GVOL 70 95 dB Vo=0.5V~3.5V; RL=2.0k; Vo=3.0V 6
Common mode rejection ratio CMRR 65 90 dB Vcc=40V 6
Output absorbing current Io- 0.3 0.7 mA Vo (pin3)=0.7V 6
Output source current Io+ -2 -4 mA Vo (pin3)=3.5V 6
Input threshold voltage (PWM comparator, zero duty cycle) VTH 4 4.5 V Zero duty cycle 6
Input suction current II- 0.3 0.7 mA V (pin3)=0.7V 6
Dead-zone control input bias current IIB(DT) -2 -10 A Vin=0V~5.25V 6
Input threshold voltage (pin4), zero duty cycle VTH 3 3.3 V Zero duty cycle 6
Input threshold voltage (pin4), maximum duty cycle VTH 0 V Maximum duty cycle 6
Maximum duty cycle (per output) DCmax 45 % Vin=0V; RT=12k; CT=0.1F 6
Frequency fosc 10 kHz RT=12k; CT=0.01F 6
Standard frequency offset fosc 3 % RT=30k; CT=0.001F 6
Frequency variation with voltage fosc/V 0.1 % Vcc=7.0V~40V 6
Change in frequency with temperature fosc/T 12 % RT=12k; CT=0.01F; Tamb=Tlow~Thigh 6
Low current input (initiation control) ISTL -25 -200 A V (pin3)=0.4V 7
High current input (initiation control) ISTH 25 200 A V (pin13)=2.4V 7
High current input (initiation control) ISTH 75 A V (pin13)=Vref 7
Standby current (pin 6 is the reference voltage, other input and output are open) Icc 6 10 mA Vcc=15V 7
Standby current (pin 6 is the reference voltage, other input and output are open) Icc 9 15 mA Vcc=40V 7
Average power current Icc 7.5 mA Vcc=15V; RT=12k; CT=0.01F; V (pin14)=2.0V 7

CAD (KiCad official)

  • Symbol: XL494
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: xl494-etched.step / xl494-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl494.step / xl494.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (13 pp, sha256 ff20f9b9965a750b, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF