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XL3845

Public Made by Adom

by adom

XINLUDA AC-DC Controllers And Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XL3845

XINLUDA · AC-DC Controllers And Regulators · SOP-8

XL3845 from XINLUDA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Error amplifier output, made available for loop compensation, with a maximum sink current of 10 mA.
2 VFB input Inverting input of the error amplifier, normally connected to the switching power supply output through a resistor divider, with analog inputs limited to -0.3 V to 5.5 V.
3 ISENSE input Input carrying a voltage proportional to inductor current, which the PWM uses to terminate output switch conduction; the analog input is limited to -0.3 V to 5.5 V and the typical maximum input signal is 1 V.
4 RT/CT passive Oscillator timing pin where resistor RT connects to VREF and capacitor CT to ground, setting the oscillator frequency and maximum output duty cycle; operation up to 500 kHz is possible.
5 GROUND power_in Combined control circuitry and power ground, to which all voltages are referenced.
6 OUTPUT output Output that directly drives the gate of a power MOSFET, sourcing and sinking peak currents up to 1 A.
7 VCC power_in Positive supply of the control IC, with a recommended supply voltage of 12 V to 28 V.
8 VREF power_out Reference output, nominally 5.0 V, which provides the charging current for capacitor CT through resistor RT; reference output current is limited to -20 mA.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (low impedance source) Vi 30 V low impedance source 4
Output Current IO 1 A 4
Output Energy (capacitive load) EO 5 J capacitive load 4
Analog Inputs (pins 2, 3) -0.3 5.5 V pins 2, 3 4
Error Amplifier Output Sink Current 10 mA 4
Power Dissipation (SO8) Ptot 800 mW Tamb 25 C 4
Storage Temperature Range Tstg -65 150 C 4
Junction Operating Temperature TJ -40 150 C 4
Lead Temperature (soldering 10s) TL 300 C soldering 10s 4
Supply voltage VCC 12 28 V 4
Input voltage (VFB) VFB 2.5 V 4
Input voltage (ISENSE) VISENSE 1 V 4
Supply current, externally limited IVCC 25 mA 4
Average output current IOUTPUT 200 mA 4
Reference output current IVREF -20 mA 4
Oscillator frequency fOSC 100 500 kHZ 4
Operating free-air temperature (384X) TA 0 70 C 384X 4
Thermal Resistance Junction-ambient (SOP8) Rth j-amb 150 C/W 4
VREF Output Voltage VREF 4.9 5 5.1 V Tj = 25C Io = 1mA 5
VREF Line Regulation VREF 8 20 mV 12V ≤ Vi ≤ 25V 5
VREF Load Regulation VREF 8 25 mV 1 ≤ Io ≤ 20mA 5
Total Output Variation 4.82 5.18 V Line, Load, Temperature 5
Long Term Stability 7 30 mV Tamb = 125C, 1000Hrs 5
Output Short Circuit Current ISC -30 -100 -180 mA 5
Oscillator initial accuracy fOSC 38 52 65 KHz Tj = 25C 5
Frequency change with voltage fOSC/V 0.6 5 % VCC = 12V to 25V 5
Discharge Current (TJ = 25C) Idischg 7.8 8.3 8.8 mA VOSC = 2V; TJ = 25°C 5
Discharge Current (TA range) Idischg 7.6 8.8 mA TA = Tlow to Thigh 5
Error amp input voltage V2 2.42 2.5 2.58 V VPIN1 = 2.5V 5
Error amp input bias current Ib -0.1 -2 A VFB = 5V 5
Error amp open-loop gain AVOL 65 90 dB 2V ≤ Vo ≤ 4V 5
Unity gain bandwidth BW 0.7 1 MHz TJ = 25C 5
Power supply rejection ratio (error amp) 60 70 dB 12V ≤ Vi ≤ 25V 5
Error amp output sink current Io 2 6 mA VPIN2 = 2.7V VPIN1 = 1.1V 5
Error amp output source current Io -0.5 -1 mA VPIN2 = 2.3V VPIN1 = 5V 5
Error amp VOUT high 5 6.2 V VPIN2 = 2.3V; RL = 15K to Ground 5
Error amp VOUT low 0.8 1.1 V VPIN2 = 2.7V; RL = 15K to Pin 8 5
Current sense gain GV 2.85 3 3.15 V/V 5
Maximum input signal (current sense) V3 0.9 1 1.1 V VPIN1 = 5V (note 3) 5
Current sense input bias current Ib -2 -10 A 5
Delay to output 150 300 ns 5
Output low level (20mA sink) VOL 0.1 0.4 V ISINK = 20mA 6
Output low level (200mA sink) VOL 1.6 2.2 V ISINK = 200mA 6
Output high level (20mA source) VOH 13 13.5 V ISOURCE = 20mA 6
Output high level (200mA source) VOH 12 13.5 V ISOURCE = 200mA 6
UVLO saturation VOLS 0.1 1.1 V VCC = 6V; ISINK = 1mA 6
Rise time tr 50 150 ns Tj = 25C CL = 1nF 6
Fall time tf 50 150 ns Tj = 25C CL = 1nF 6
Start threshold (X843/5) 7.8 8.4 9 V 6
Min operating voltage after turn-on (X843/5) 7 7.6 8.2 V 6
Maximum duty cycle (X844/5) 45 48 50 % 6
Minimum duty cycle 0 % 6
Start-up current (X843/45) Ist 0.3 0.5 mA VCC = 6.5V for X843/45 6
Operating supply current Ii 12 20 mA VPIN2 = VPIN3 = 0V 6
Zener voltage Viz 34 V Ii = 25mA 6

CAD (KiCad official)

  • Symbol: XL3845
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: xl3845-etched.step / xl3845-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl3845.step / xl3845.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (17 pp, sha256 4b7d8ea5c3774ad1, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF