component

XL2843

Public Made by Adom

by adom

XINLUDA AC-DC Controllers and Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs xl2843: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json xl2843: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md xl2843: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
xl2843-etched.fit.json xl2843: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
xl2843-etched.glb xl2843: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
xl2843-etched.step xl2843: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
xl2843.glb Publish 0.1.0 · Ray
xl2843.kicad_mod Publish 0.1.0 · Ray
xl2843.kicad_sym Publish 0.1.0 · Ray
xl2843.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
xl2843.step Publish 0.1.0 · Ray

XL2843

XINLUDA · AC-DC Controllers and Regulators · SOP-8

XL2843 from XINLUDA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Error Amplifier output; made available for external loop compensation (typically an R-C network to VFB).
2 VFB input Inverting input of the internal Error Amplifier. Normally connected to the switching supply output via a resistor divider; internal reference at this node is 2.50 V.
3 ISENSE input Current-sense input. A voltage proportional to inductor/switch current is applied here; the PWM comparator terminates the output pulse when this pin reaches ~1 V, providing cycle-by-cycle current limiting.
4 RT/CT passive Oscillator timing pin. Connect RT from VREF to this pin and CT from this pin to GND to program the oscillator frequency and maximum duty cycle. Operation up to 500 kHz.
5 GROUND power_in Combined control-circuitry and power ground. Reference for all voltages; timing and bypass caps must be returned here in a single-point ground.
6 OUTPUT output Totem-pole gate-drive output for an external N-channel power MOSFET. Sources and sinks peak currents up to ±1 A; low in the OFF state. VOH typ 13.5 V @ 200 mA source, VOL typ 1.6 V @ 200 mA sink.
7 VCC power_in Positive supply for the control IC. Recommended operating supply 12-28 V; UVLO turn-on 8.4 V typ, turn-off 7.6 V typ (XL2843). Absolute max low-impedance supply 30 V; internal zener clamps at ~34 V.
8 VREF power_out Buffered 5.0 V trimmed reference output (5.00 V typ, ±1% at 25 °C). Supplies charging current for CT through RT; source current limited to 20 mA (recommended), internally short-circuit protected.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-8
Category PMIC
Pins 8

CAD (KiCad official)

  • Symbol: XL2843
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: xl2843-etched.step / xl2843-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl2843.step / xl2843.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (17 pp, sha256 382dd1be0888bf48, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF