component
XL2803CD
Public Made by Adomby adom
XINLUDA Darlington Transistor Arrays, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
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| viewers | 17d ago |
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| page.json | 17d ago |
| README.md | 17d ago |
| xl2803cd-etched.glb | 17d ago |
| xl2803cd-etched.step | 17d ago |
| xl2803cd-hero.glb | 17d ago |
| xl2803cd-hero.overlay.json | 17d ago |
| xl2803cd.glb | 17d ago |
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| xl2803cd.step | 17d ago |
XL2803CD
XINLUDA · Darlington Transistor Arrays · SOP-20
XL2803CD from XINLUDA, in a SOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1B | input | Channel 1 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 2 | 2B | input | Channel 2 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 3 | 3B | input | Channel 3 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 4 | 4B | input | Channel 4 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 5 | 5B | input | Channel 5 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 6 | 6B | input | Channel 6 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 7 | 7B | input | Channel 7 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 8 | 8B | input | Channel 8 Darlington base input, driven through the built-in 2.7-kΩ series base resistor for direct operation with TTL or 5-V CMOS logic. |
| 9 | GND | power_in | Common emitter shared by all eight Darlington channels, typically tied to ground. |
| 10 | NC | unconnected | No connect pin. |
| 11 | NC | unconnected | No connect pin. |
| 12 | COM | bidirectional | Common cathode node for the flyback clamp diodes, required for inductive loads and typically tied to the coil supply; outputs should not heavily exceed the COM voltage. |
| 13 | 8C | output | Channel 8 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
| 14 | 7C | output | Channel 7 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
| 15 | 6C | output | Channel 6 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
| 16 | 5C | output | Channel 5 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
| 17 | 4C | output | Channel 4 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
| 18 | 3C | output | Channel 3 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
| 19 | 2C | output | Channel 2 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
| 20 | 1C | output | Channel 1 Darlington collector output, rated for 50 V collector-emitter voltage and 500 mA collector current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | SOP-20 |
| Category | Transistors/Thyristors |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-emitter voltage | VCE | 50 | V | 4 | |||
| Input voltage | VI | 30 | V | 4 | |||
| Peak collector current | 500 | mA | 4 | ||||
| Output clamp current | I(clamp) | 500 | mA | 4 | |||
| Total substrate-terminal current | -2.5 | A | 4 | ||||
| Junction temperature | TJ | -65 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Electrostatic discharge, human body model | V(ESD) | -2000 | 2000 | V | HBM, per ANSI/ESDA/JEDEC JS-001 | 4 | |
| Electrostatic discharge, charged device model | V(ESD) | -500 | 500 | V | CDM, per ANSI/ESDA/JEDEC JS-002 | 4 | |
| Collector-emitter voltage (recommended) | VCE | 0 | 50 | V | over operating free-air temperature range | 4 | |
| Ambient temperature | TA | -40 | 85 | °C | over operating free-air temperature range | 4 | |
| Collector cutoff current | ICEX | 50 | μA | VCE = 50 V, II = 0, see Figure 7-1 | 5 | ||
| Off-state input current | II(off) | 50 | 65 | μA | VCE = 50 V, TA = 70°C, IC = 500 μA, see Figure 7-2 | 5 | |
| Input current | I(on) | 0.93 | 1.35 | mA | VI = 3.85 V, see Figure 7-3 | 5 | |
| On-state input voltage | VI(on) | 2.4 | V | VCE = 2 V, IC = 200 mA, see Figure 7-4 | 5 | ||
| On-state input voltage | VI(on) | 2.7 | V | VCE = 2 V, IC = 250 mA, see Figure 7-4 | 5 | ||
| On-state input voltage | VI(on) | 3 | V | VCE = 2 V, IC = 300 mA, see Figure 7-4 | 5 | ||
| Collector-emitter saturation voltage | VCE(sat) | 0.9 | 1.1 | V | II = 250 μA, IC = 100 mA, see Figure 7-5 | 5 | |
| Collector-emitter saturation voltage | VCE(sat) | 1 | 1.3 | V | II = 350 μA, IC = 200 mA, see Figure 7-5 | 5 | |
| Collector-emitter saturation voltage | VCE(sat) | 1.3 | 1.6 | V | II = 500 μA, IC = 350 mA, see Figure 7-5 | 5 | |
| Clamp diode reverse current | IR | 50 | μA | VR = 50 V, see Figure 7-6 | 5 | ||
| Clamp diode forward voltage | VF | 1.7 | 2 | V | IF = 350 mA, see Figure 7-7 | 5 | |
| Input capacitance | Ci | 15 | 25 | pF | VI = 0, f = 1 MHz | 5 | |
| Propagation delay time, low- to high-level output | tPLH | 130 | ns | VS = 50 V, CL = 15 pF, RL = 163 Ω, see Figure 7-8 | 5 | ||
| Propagation delay time, high- to low-level output | tPHL | 20 | ns | VS = 50 V, CL = 15 pF, RL = 163 Ω, see Figure 7-8 | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 68.8 | °C/W | 4 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 34.3 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 37.5 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 10.7 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 37 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
XL2803CD - Footprint:
Package_SO:SOP-20_7.5x12.8mm_P1.27mm - 3D model: SOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
xl2803cd-etched.step/xl2803cd-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xl2803cd.step/xl2803cd.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (14 pp, sha256
50747eab48817fbe, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).