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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs xl2596s-5-0e1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json add symbol pin "6" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no net (vendor string 'TO-263-5' states 5 pins and the footprint has exactly one more pad, so it is the tab) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 10d ago
README.md xl2596s-5-0e1: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
xl2596s-5-0e1-etched.fit.json xl2596s-5-0e1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
xl2596s-5-0e1-etched.glb xl2596s-5-0e1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
xl2596s-5-0e1-etched.step xl2596s-5-0e1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
xl2596s-5-0e1.glb fix footprint: TO-263-2 -> TO-263-5_TabPin6 (pad_count, 5 pins) · Ray 1mo ago
xl2596s-5-0e1.kicad_mod fix footprint: TO-263-2 -> TO-263-5_TabPin6 (pad_count, 5 pins) · Ray 1mo ago
xl2596s-5-0e1.kicad_sym add symbol pin "6" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no net (vendor string 'TO-263-5' states 5 pins and the footprint has exactly one more pad, so it is the tab) · Ray 1mo ago
xl2596s-5-0e1.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 6 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
xl2596s-5-0e1.step fix footprint: TO-263-2 -> TO-263-5_TabPin6 (pad_count, 5 pins) · Ray 1mo ago

XL2596S-5.0E1

XLSEMI · DC-DC Converters · TO-263-5

XL2596S-5.0E1 from XLSEMI, in a TO-263-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply voltage input. Operates from 4.5V to 40V DC. Bypass to GND with a suitably large capacitor (e.g. 470uF/35V in the typical app) to eliminate noise on the input. Absolute maximum -0.3 to 45V.
2 OUTPUT output Power switch output (SW). Internal NPN power transistor emitter/switch node that drives the external inductor and catch (Schottky) diode. Rated for 3A continuous load current with duty cycle up to 100%.
3 GND power_in Ground pin. Layout critical: route outside of the Schottky diode-to-output-capacitor ground path to prevent switching current spikes from injecting voltage noise into the XL2596. Metal tab is also tied to GND.
4 FEEDBACK input Feedback pin (FB). Senses the output voltage through an external resistor divider and regulates it to the internal 1.23V reference. For the fixed-5.0V version this pin is tied directly to VOUT (no divider needed).
5 ON/OFF input Enable pin with hysteresis. Drive LOW (or float, default low) to turn the device ON; drive HIGH to shut it down (TTL shutdown capable). Absolute max -0.3V to VIN.

Key specifications

Parameter Value
Manufacturer XLSEMI
Package TO-263-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • XL2596S-5.0E1
  • XL2596S-5.0E1S-3.3E1
  • XL2596S-5.0E1S-ADJE1
  • XL2596S-5.0E1S-12E1
  • XL2596S-5.0E1T-5.0E1
  • XL2596S-5.0E1T-3.3E1
  • XL2596S-5.0E1T-ADJE1
  • XL2596S-5.0E1T-12E1

CAD (KiCad official)

  • Symbol: XL2596S-5.0E1
  • Footprint: Package_TO_SOT_SMD:TO-263-5_TabPin6
  • 3D model: TO-263-5 (KiCad packages3D, STEP)
  • 3D model files: xl2596s-5-0e1-etched.step / xl2596s-5-0e1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl2596s-5-0e1.step / xl2596s-5-0e1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
xl2596s-5-0e1.step 180 KB You want the bare part, or you mark your own boards.
xl2596s-5-0e1-etched.step 2.4 MB You want the part with XL2596S-5.0E1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 617 faces against 135 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XLSEMI datasheet (14 pp, sha256 c2a385c60d33d0a3, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF