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Contents

README

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XL2110PBF

XINLUDA · Gate Drivers · DIP-14

XL2110PBF from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LO output Low side gate drive output, driven in phase with LIN and swinging between COM and VCC.
2 COM power_in Low side return, the reference for VCC and the LO output.
3 VCC power_in Low side fixed supply, recommended 10 V to 20 V (absolute maximum 25 V).
4 NC unconnected Position 4 is drawn on the DIP14 lead assignment with no pin name, so it is treated as having no function.
5 VS power_in High side floating supply return (offset), operating up to 500 V (XL2110) or 600 V (XL2113).
6 VB power_in High side floating supply, recommended VS + 10 V to VS + 20 V, absolute maximum 525 V (XL2110) or 625 V (XL2113).
7 HO output High side gate drive output, driven in phase with HIN and referenced to VS.
8 NC unconnected Position 8 is drawn on the DIP14 lead assignment with no pin name, so it is treated as having no function.
9 VDD power_in Logic supply, recommended VSS + 3 V to VSS + 20 V.
10 HIN input Logic input for the high side gate driver output (HO), in phase, with a CMOS Schmitt trigger and pull-down.
11 SD input Logic input for shutdown, with a CMOS Schmitt trigger and pull-down.
12 LIN input Logic input for the low side gate driver output (LO), in phase, with a CMOS Schmitt trigger and pull-down.
13 VSS power_in Logic ground, with a ±5 V offset allowed relative to COM.
14 NC unconnected Position 14 is drawn on the DIP14 lead assignment with no pin name, so it is treated as having no function.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-14
Category Motor Driver ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High side floating supply voltage (XL2110) VB -0.3 525 V 4
Low side fixed supply voltage VCC -0.3 25 V 4
Low side output voltage VLO -0.3 V 4
Logic supply voltage VDD -0.3 V 4
Allowable offset supply voltage transient dVs/dt 50 V/ns figure 2 4
Package power dissipation (14 lead DIP) PD 1.6 W @ TA +25°C 4
Junction temperature TJ 150 °C 4
Storage temperature TS -55 150 °C 4
Lead temperature (soldering) TL 300 °C soldering, 10 seconds 4
Thermal resistance, junction to ambient (14 lead DIP) RTHJA 75 °C/W 14 lead DIP 4
High side floating supply offset voltage (XL2110) VS 500 V Note 1: logic operational for VS of -4 to +500V 4
Low side fixed supply voltage VCC 10 20 V 4
Low side output voltage VLO 0 V 4
Logic supply offset voltage VSS -5 5 V Note 2: when VDD < 5V, minimum VSS offset is limited to -VDD 4
Ambient temperature TA -40 85 °C 4
Turn-on propagation delay ton 120 150 ns VS = 0V 5
Turn-off propagation delay toff 94 125 ns VS = 500V/600V 5
Shutdown propagation delay tsd 110 140 ns VS = 500V/600V 5
Turn-on rise time tr 25 35 ns 5
Turn-off fall time tf 17 25 ns 5
Delay matching, HS & LS turn-on/off (XL2110) MT 10 ns 5
Logic "1" input voltage VIH 9.5 V 5
Logic "0" input voltage VIL 6 V 5
High level output voltage, VBIAS - VO VOH 1.2 V IO = 0A 5
Low level output voltage, VO VOL 0.1 V IO = 0A 5
Offset supply leakage current ILK 50 µA VB=VS = 500V/600V 5
Quiescent VBS supply current IQBS 125 230 µA VIN = 0V or VDD 5
Quiescent VCC supply current IQCC 180 340 µA VIN = 0V or VDD 5
Quiescent VDD supply current IQDD 15 30 µA VIN = 0V or VDD 5
Logic "1" input bias current IIN+ 20 40 µA VIN = VDD 5
Logic "0" input bias current IIN- 1 µA VIN = 0V 5
VBS supply undervoltage positive going threshold VBSUV+ 7.5 8.6 9.7 V 5
VBS supply undervoltage negative going threshold VBSUV- 7 8.2 9.4 V 5
VCC supply undervoltage positive going threshold VCCUV+ 7.4 8.5 9.6 V 5
VCC supply undervoltage negative going threshold VCCUV- 7 8.2 9.4 V 5
Output high short circuit pulsed current IO+ 2 2.5 A VO=0V, VIN=VDD, PW ≤ 10 µs 5
Output low short circuit pulsed current IO- 2 2.5 A VO=15V, VIN=0V, PW ≤ 10 µs 5

CAD (KiCad official)

  • Symbol: XL2110PBF
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: xl2110pbf-etched.step / xl2110pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl2110pbf.step / xl2110pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (18 pp, sha256 36345af34e6f57a2, retrieved 2026-10-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF