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Contents

README

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XL2026-1

XINLUDA · Power Distribution Switches · SOP-8

XL2026-1 from XINLUDA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ENA input Logic-compatible enable input for switch A; on the XL2026-1 it is active high, with the switch on at VENA ≥ 2.4 V and off at VENA ≤ 0.8 V.
2 FLGA output Active-low, open-drain fault flag for switch A that asserts on overcurrent or thermal shutdown, with overcurrent asserted only after the flag response delay (typically 3 ms per the functional description).
3 FLGB output Active-low, open-drain fault flag for switch B that asserts on overcurrent or thermal shutdown, with overcurrent asserted only after the flag response delay (typically 3 ms per the functional description).
4 ENB input Logic-compatible enable input for switch B; on the XL2026-1 it is active high, with the switch on at VENB ≥ 2.4 V and off at VENB ≤ 0.8 V.
5 OUTB output Power output of switch B, the source of its output MOSFET, which is internally current limited.
6 GND power_in Ground connection for the device.
7 IN power_in Switch and logic supply input operating from 2.7 V to 5.5 V, which is also the drain of the output MOSFETs.
8 OUTA output Power output of switch A, the source of its output MOSFET, which is internally current limited.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package SOP-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (VIN) VIN 6 V 3
Fault Flag Voltage (VFLG) VFLG 6 V 3
Fault Flag Current (IFLG) IFLG 25 mA 3
Output Voltage (VOUT) VOUT 6 V 3
Storage Temperature (TS) TS -65 150 °C 3
Supply Voltage (VIN) operating range VIN 2.7 5.5 V 3
Ambient Temperature (TA) TA -40 85 °C 3
Thermal Resistance SOP (θJA) θJA 160 °C/W 3
Supply Current (switch off) IDD 0.75 5 μA XL2026-1, VENA=VENB≤0.8V (switch off), OUT = open 4
Supply Current (switch on) IDD 100 160 μA XL2026-1, VENA=VENB≥2.4V (switch on), OUT = open 4
Enable Input Threshold low-to-high transition VEN 1.7 2.4 V low-to-high transition 4
Enable Input Threshold high-to-low transition VEN 0.8 1.45 V high-to-low transition 4
Enable Input Current IEN -1 0.01 1 μA VEN=0V to 5.5V 4
Switch Resistance VIN=5V RDS(ON) 90 140 mΩ VIN= 5V, IOUT=500mA 4
Switch Resistance VIN=3.3V RDS(ON) 100 170 mΩ VIN=3.3V, IOUT=500mA 4
Output Leakage Current 10 μA XL2026-1, VENx≤0.8V; XL2026-1, VENx≥2.4V (output off) 4
Output Turn-On Delay tON 1.3 5 ms RL=10Ω, CL=1μF, see Timing Diagrams 4
Output Turn-On Rise Time tR 0.5 1.15 4.9 ms RL=10Ω, CL=1μF, see Timing Diagrams 4
Output Turn-Off Delay tOFF 35 100 μs RL=10Ω, CL=1μF, see Timing Diagrams 4
Output Turn-Off Fall Time tF 32 100 μs RL=10Ω, CL=1μF, see Timing Diagrams 4
Short-Circuit Output Current ILIMIT 0.5 0.9 1.25 A VOUT=0V, enabled into short-circuit 4
Current-Limit Threshold 0.65 1 1.25 A ramped load applied to output 4
Overcurrent Flag Response Delay VIN=5V 1.5 3 7 ms VIN=5V, apply VOUT=0V until FLG low 4
Undervoltage Lockout Threshold (VIN rising) 2.2 2.4 2.7 V VIN rising 4
Undervoltage Lockout Threshold (VIN falling) 2 2.15 2.5 V VIN falling 4
Error Flag Output Resistance VIN=5V 10 25 Ω IL= 10mA, VIN=5V 4
Error Flag Output Resistance VIN=3.3V 15 40 Ω IL=10mA, VIN=3.3V 4
Error Flag Off Current 10 μA VFLAG =5V 4
Overtemperature Threshold (TJ increasing, each switch) 140 °C TJ increasing, each switch 4
Overtemperature Threshold (TJ decreasing, each switch) 120 °C TJ decreasing, each switch 4
Overtemperature Threshold (TJ increasing, both switches) 160 °C TJ increasing, both switches 4
Overtemperature Threshold (TJ decreasing, both switches) 150 °C TJ decreasing, both switches 4
Enable Input Hysteresis 250 mV 4
Enable Input Capacitance 1 pF 4
Short-Circuit Response Time 20 μs VOUT=0V to IOUT=ILIMIT (short applied to output) 4
Overcurrent Flag Response Delay VIN=3.3V 3 ms VIN=3.3V, apply VOUT=0V until FLG low 4

CAD (KiCad official)

  • Symbol: XL2026-1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: xl2026-1-etched.step / xl2026-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xl2026-1.step / xl2026-1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (15 pp, sha256 822eb854f23c92eb, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF