component
XL0832DR
Public Made by Adomby adom
XINLUDA Analog To Digital Converters (ADC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538
{
"schema_version": 1,
"type": "component",
"slug": "xl0832dr",
"title": "XL0832DR",
"brief": "XINLUDA Analog To Digital Converters (ADC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"data acquisition",
"xl0832dr",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "XL0832DR",
"manufacturer": "XINLUDA",
"package": "SOP-8",
"pin_count": 8,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345681667551232",
"parts": {
"symbol": "xl0832dr.kicad_sym",
"footprint": "xl0832dr.kicad_mod",
"model_3d": "xl0832dr-hero.glb",
"model_3d_plain": "xl0832dr-etched.glb",
"model_3d_step": "xl0832dr-etched.step",
"model_3d_step_plain": "xl0832dr.step",
"lbr": "xl0832dr.lbr"
},
"distributor_links": {
"lcsc": "C22397806"
},
"distributor_check": {
"checked_at": "2026-10-18T07:16:41Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "CS",
"type": "input",
"description": "Chip select, active low: it must be held low for the entire conversion, and taking it high ends the process and disables the chip."
},
{
"number": "2",
"name": "CH0",
"type": "passive",
"description": "Analog input channel 0, configurable as IN+ or IN- in differential mode or as a single-ended input."
},
{
"number": "3",
"name": "CH1",
"type": "passive",
"description": "Analog input channel 1, configurable as IN+ or IN- in differential mode or as a single-ended input."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "5",
"name": "DI",
"type": "input",
"description": "Serial data input that carries the start bit and the channel/polarity configuration bits, latched on each CLK rising edge; it is ignored after the third clock pulse of addressing."
},
{
"number": "6",
"name": "DO",
"type": "tri_state",
"description": "Serial conversion data output, MSB first on the first byte and then LSB first on the second; it is high-impedance while CS is high and not in the output phase, and the CLK-falling-to-valid-data delay is 2000 ns maximum (MSB first, 100 pF load)."
},
{
"number": "7",
"name": "CLK",
"type": "input",
"description": "Serial clock input with a working frequency of 10 kHz to 400 kHz and a 40% to 60% duty cycle."
},
{
"number": "8",
"name": "VCC/REF",
"type": "power_in",
"description": "Supply input (4.5 V minimum, 5.0 V nominal per the electrical table; absolute maximum VCC is 6.5 V) that also serves as the reference voltage input."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin descriptions give the channel function only; the analog input voltage range is not stated explic; The DO output delay and high-impedance behaviour are stated in the timing table and the sequence des; Text lists the 4.5 V figure under 'Power Supply' with no explicit min/max label; it is read as the m"
],
"pages_sent": 7,
"cost_usd": 0.0344,
"at": "2026-10-18T07:14:27"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345681667551232",
"pages": 7,
"sha256": "87c7ef837612e9ba",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "xl0832dr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "xl0832dr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "2d6363b1f89fdf6efebd2f20bf28fc6be1d1339c4a64a9a4fea66b8e5bf904c4",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "XINLUDA",
"Package": "SOP-8",
"Category": "Data Acquisition",
"Pins": "8"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "87c7ef837612e9ba49b69ec520fccb60961c657fcdb921ce97531dea80aedce0",
"rows": [
{
"name": "Supply current",
"symbol": "ICC",
"kind": "electrical",
"unit": "mA",
"min": null,
"typ": null,
"max": 2,
"conditions": "",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Power supply",
"symbol": "VCC",
"kind": "electrical",
"unit": "V",
"min": 4.5,
"typ": null,
"max": null,
"conditions": "",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Logical 1 input voltage (min)",
"symbol": "VIH",
"kind": "electrical",
"unit": "V",
"min": 2,
"typ": null,
"max": null,
"conditions": "VCC=5.25V",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Logical 0 input voltage (max)",
"symbol": "VIL",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.8,
"conditions": "VCC=4.75V",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Logical 1 input current (max)",
"symbol": "IIH",
"kind": "electrical",
"unit": "µA",
"min": null,
"typ": null,
"max": 10,
"conditions": "VIN=5.0V",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Logical 0 input current (max)",
"symbol": "IIL",
"kind": "electrical",
"unit": "µA",
"min": null,
"typ": null,
"max": -10,
"conditions": "VIN=0V",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Logical 1 output voltage (min)",
"symbol": "VOH",
"kind": "electrical",
"unit": "V",
"min": 2.4,
"typ": null,
"max": null,
"conditions": "VCC=4.75V, IOUT=−360 µA",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Logical 1 output voltage (min)",
"symbol": "VOH",
"kind": "electrical",
"unit": "V",
"min": 4.5,
"typ": null,
"max": null,
"conditions": "VCC=4.75V, IOUT=−10 µA",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Logical 0 output voltage (max)",
"symbol": "VOL",
"kind": "electrical",
"unit": "V",
"min": null,
"typ": null,
"max": 0.4,
"conditions": "VCC=4.75V, IOUT=1.6mA",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Output source current (min)",
"symbol": "ISOURCE",
"kind": "electrical",
"unit": "mA",
"min": -6.5,
"typ": -14,
"max": null,
"conditions": "VOUT=0V",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Output sink current (min)",
"symbol": "ISINK",
"kind": "electrical",
"unit": "mA",
"min": 8,
"typ": 16,
"max": null,
"conditions": "VOUT=VCC",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Working clock frequency",
"symbol": "fCLK",
"kind": "timing",
"unit": "kHz",
"min": 10,
"typ": null,
"max": 400,
"conditions": "",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Conversion time",
"symbol": "tC",
"kind": "timing",
"unit": "1/fCLK",
"min": 8,
"typ": null,
"max": null,
"conditions": "Not including MUX addressing time",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Clock duty cycle",
"symbol": "",
"kind": "timing",
"unit": "%",
"min": 40,
"typ": null,
"max": 60,
"conditions": "",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Data input valid after CLK rising edge (hold)",
"symbol": "tHOLD",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 200,
"conditions": "",
"source_page": 3,
"source": "datasheet"
},
{
"name": "CLK falling edge to output data valid, MSB first",
"symbol": "tpd1",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 2000,
"conditions": "CL=100 pF, data MSB first",
"source_page": 3,
"source": "datasheet"
},
{
"name": "CLK falling edge to output data valid, LSB first",
"symbol": "tpd0",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 1000,
"conditions": "CL=100 pF, data LSB first",
"source_page": 3,
"source": "datasheet"
},
{
"name": "Rising edge of CS to data output and SAR Hi-Z",
"symbol": "t1H,t0H",
"kind": "timing",
"unit": "ns",
"min": null,
"typ": null,
"max": 400,
"conditions": "CL=10 pF, RL=10k",
"source_page": 3,
"source": "datasheet"
},
{
"name": "VCC end to GND voltage",
"symbol": "VCC",
"kind": "absolute_maximum",
"unit": "V",
"min": -0.5,
"typ": null,
"max": 6.5,
"conditions": "VCC end to GND",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Storage temperature",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Operating ambient temperature",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": -20,
"typ": null,
"max": 85,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Welding temperature",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 260,
"conditions": "10 seconds",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Maximum junction temperature",
"symbol": "",
"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 150,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Diffusion power dissipation",
"symbol": "",
"kind": "absolute_maximum",
"unit": "W",
"min": null,
"typ": null,
"max": 0.8,
"conditions": "",
"source_page": 2,
"source": "datasheet"
},
{
"name": "ESD (HBM) withstand voltage",
"symbol": "",
"kind": "absolute_maximum",
"unit": "KV",
"min": null,
"typ": null,
"max": 4,
"conditions": "HBM",
"source_page": 2,
"source": "datasheet"
},
{
"name": "Operating temperature range (ordering table)",
"symbol": "",
"kind": "recommended_operating",
"unit": "°C",
"min": -20,
"typ": null,
"max": 85,
"conditions": "",
"source_page": 6,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"xl0832dr"
],
"discovery_pitch": "XL0832DR (XINLUDA) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"xl0832dr.kicad_sym",
"xl0832dr.kicad_mod",
"xl0832dr.glb",
"xl0832dr.step",
"xl0832dr.lbr",
"docs/hero.png",
"docs/xl0832dr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"xl0832dr-hero.glb",
"xl0832dr-hero.overlay.json",
"xl0832dr-etched.glb"
]
}