XL0832DR

{
  "slug": "xl0832dr",
  "version": "0.1.0",
  "type": "component",
  "description": "XINLUDA Analog To Digital Converters (ADC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "xl0832dr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "xl0832dr.kicad_sym",
    "xl0832dr.kicad_mod",
    "xl0832dr.glb",
    "xl0832dr.step",
    "xl0832dr.lbr",
    "docs/hero.png",
    "docs/xl0832dr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "xl0832dr-hero.glb",
    "xl0832dr-hero.overlay.json",
    "xl0832dr-etched.glb"
  ],
  "component": {
    "mpn": "XL0832DR",
    "manufacturer": "XINLUDA",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345681667551232",
    "parts": {
      "symbol": "xl0832dr.kicad_sym",
      "footprint": "xl0832dr.kicad_mod",
      "model_3d": "xl0832dr-hero.glb",
      "model_3d_plain": "xl0832dr-etched.glb",
      "model_3d_step": "xl0832dr-etched.step",
      "model_3d_step_plain": "xl0832dr.step",
      "lbr": "xl0832dr.lbr"
    },
    "distributor_links": {
      "lcsc": "C22397806"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T07:16:41Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CS",
        "type": "input",
        "description": "Chip select, active low: it must be held low for the entire conversion, and taking it high ends the process and disables the chip."
      },
      {
        "number": "2",
        "name": "CH0",
        "type": "passive",
        "description": "Analog input channel 0, configurable as IN+ or IN- in differential mode or as a single-ended input."
      },
      {
        "number": "3",
        "name": "CH1",
        "type": "passive",
        "description": "Analog input channel 1, configurable as IN+ or IN- in differential mode or as a single-ended input."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device."
      },
      {
        "number": "5",
        "name": "DI",
        "type": "input",
        "description": "Serial data input that carries the start bit and the channel/polarity configuration bits, latched on each CLK rising edge; it is ignored after the third clock pulse of addressing."
      },
      {
        "number": "6",
        "name": "DO",
        "type": "tri_state",
        "description": "Serial conversion data output, MSB first on the first byte and then LSB first on the second; it is high-impedance while CS is high and not in the output phase, and the CLK-falling-to-valid-data delay is 2000 ns maximum (MSB first, 100 pF load)."
      },
      {
        "number": "7",
        "name": "CLK",
        "type": "input",
        "description": "Serial clock input with a working frequency of 10 kHz to 400 kHz and a 40% to 60% duty cycle."
      },
      {
        "number": "8",
        "name": "VCC/REF",
        "type": "power_in",
        "description": "Supply input (4.5 V minimum, 5.0 V nominal per the electrical table; absolute maximum VCC is 6.5 V) that also serves as the reference voltage input."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin descriptions give the channel function only; the analog input voltage range is not stated explic; The DO output delay and high-impedance behaviour are stated in the timing table and the sequence des; Text lists the 4.5 V figure under 'Power Supply' with no explicit min/max label; it is read as the m"
        ],
        "pages_sent": 7,
        "cost_usd": 0.0344,
        "at": "2026-10-18T07:14:27"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345681667551232",
        "pages": 7,
        "sha256": "87c7ef837612e9ba",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "xl0832dr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "xl0832dr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2d6363b1f89fdf6efebd2f20bf28fc6be1d1339c4a64a9a4fea66b8e5bf904c4",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}