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XD9170

XINLUDA · RF Transceiver ICs · DIP-18

XD9170 from XINLUDA, in a DIP-18. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VP input Operational amplifier non-inverting input, with input impedance typically 10 MΩ.
2 VN input Operational amplifier inverting input, with input impedance typically 10 MΩ.
3 GS output Operational amplifier output terminal, rated for load resistance of 50 kΩ minimum and load capacitance of 100 pF maximum.
4 VREF output Reference voltage output, normally VDD/2.
5 INH input Active-high input that inhibits detection of tones for characters A, B, C and D; internally pulled down.
6 PWDN input Active-high input that puts the device into power down mode and inhibits the oscillator; internally pulled down.
7 X1 input Oscillator input for a standard 3.579545 MHz crystal connected between X1 and X2, with on-chip inverter, bias resistor and load capacitor.
8 X2 output Oscillator output for the 3.579545 MHz crystal connected between X1 and X2.
9 VSS power_in Negative power supply, ground.
10 OE input Active-high output enable for D0~D3 (OE=L gives high impedance); internally pulled high.
11 D0 tri_state Tristate CMOS data output bit 0, enabled when OE=H and high impedance when OE=L.
12 D1 tri_state Tristate CMOS data output bit 1, enabled when OE=H and high impedance when OE=L.
13 D2 tri_state Tristate CMOS data output bit 2, enabled when OE=H and high impedance when OE=L.
14 D3 tri_state Tristate CMOS data output bit 3, enabled when OE=H and high impedance when OE=L.
15 DV output CMOS data valid output that goes high when a valid DTMF tone is received, otherwise stays low.
16 EST output CMOS early steering output used with the external RC on RT/GT for tone timing.
17 RT/GT bidirectional CMOS input/output where an external resistor and capacitor set the tone acquisition and release times.
18 VDD power_in Positive power supply, 2.5V~5.5V for normal operation.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-18
Category RF And Wireless
Pins 18

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD Operating Voltage VDD 2.5 5 5.5 V 3
Standby Current ISTB 10 25 A 5V PWDN=5V 3
Operating Current IDD 3 7 mA 5V 3
Low Input Voltage VIL 1 V 5V 3
High Input Voltage VIH 4 V 5V 3
Low Input Current IIL 0.1 A 5V VVP=VVN=0V 3
High Input Current IIH 0.1 A 5V VVP=VVN=5V 3
Pull-high Resistance (OE) ROE 60 100 150 k 5V VOE=0V 3
Source Current (D0~D3, EST, DV) IOH 0.4 0.8 mA 5V VOUT =4.5V 3
Sink Current (D0~D3, EST, DV) IOL 1 2.5 mA 5V VOUT =0.5V 3
System Frequency fOSC 3.5759 3.5795 3.5831 MHz 5V Crystal=3.5795MHz 3
DTMF Input Signal Level 36 6 dBm 3V 4
DTMF Input Signal Level 29 1 dBm 5V 4
Frequency Deviation Acceptance 1.5 % 5V 4
Frequency Deviation Rejection 3.5 % 5V 4
Tone Present Detection Time tDP 5 16 22 ms 4
Tone Absent Detection Time tDA 4 8.5 ms 4
Rejected Tone Duration tREJ 20 ms 4
Rejected Inter-digit Pause tIR 20 ms 4
Propagation Delay (RT/GT to DO) tPDO 8 11 s 4
Enable Delay (OE to DO) tEDO 50 60 ns 4
Supply Voltage VDD -0.3 6 V 3
Storage Temperature -50 125 °C 3
Operating Temperature -20 75 °C 3

CAD (KiCad official)

  • Symbol: XD9170
  • Footprint: Package_DIP:DIP-18_W7.62mm
  • 3D model: DIP-18 (KiCad packages3D, STEP)
  • 3D model files: xd9170-etched.step / xd9170-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd9170.step / xd9170.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (10 pp, sha256 0f5d4e278f189858, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF