XD7650-8

{
  "slug": "xd7650-8",
  "version": "0.1.0",
  "type": "component",
  "description": "XINLUDA Operational Amplifier, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "amplifiers-comparators",
    "xd7650-8",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "xd7650-8.kicad_sym",
    "xd7650-8.kicad_mod",
    "xd7650-8.glb",
    "xd7650-8.step",
    "xd7650-8.lbr",
    "docs/hero.png",
    "docs/xd7650-8-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "xd7650-8-hero.glb",
    "xd7650-8-hero.overlay.json",
    "xd7650-8-etched.glb"
  ],
  "component": {
    "mpn": "XD7650-8",
    "manufacturer": "XINLUDA",
    "package": "DIP-8",
    "pin_count": 8,
    "category": "Amplifiers/Comparators",
    "subcategory": "Operational Amplifier",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756647084198113280",
    "parts": {
      "symbol": "xd7650-8.kicad_sym",
      "footprint": "xd7650-8.kicad_mod",
      "model_3d": "xd7650-8-hero.glb",
      "model_3d_plain": "xd7650-8-etched.glb",
      "model_3d_step": "xd7650-8-etched.step",
      "model_3d_step_plain": "xd7650-8.step",
      "lbr": "xd7650-8.lbr"
    },
    "distributor_links": {
      "lcsc": "C968667"
    },
    "distributor_check": {
      "checked_at": "2026-10-16T03:54:46Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CEXTA",
        "type": "passive",
        "description": "Connection for external nulling storage capacitor CEXTA (0.1µF for the internal clock), the other end going to CRETN."
      },
      {
        "number": "2",
        "name": "-IN",
        "type": "input",
        "description": "Inverting input; the OUTPUT CLAMP pin is tied here on 14-pin parts, and no voltage beyond 0.3V past the supply rails may be applied."
      },
      {
        "number": "3",
        "name": "+IN",
        "type": "input",
        "description": "Non-inverting input; no voltage beyond 0.3V past the supply rails may be applied."
      },
      {
        "number": "4",
        "name": "V-",
        "type": "power_in",
        "description": "Negative supply; total supply V+ to V- operating range is 4.5V to 16V."
      },
      {
        "number": "5",
        "name": "CRETN",
        "type": "passive",
        "description": "Capacitor return pin, common connection for the two external nulling capacitors CEXTA and CEXTB."
      },
      {
        "number": "6",
        "name": "OUTPUT",
        "type": "output",
        "description": "Amplifier output, high-impedance (about 18kΩ) stage, with a 10kΩ load recommended for full swing."
      },
      {
        "number": "7",
        "name": "V+",
        "type": "power_in",
        "description": "Positive supply; total supply V+ to V- operating range is 4.5V to 16V."
      },
      {
        "number": "8",
        "name": "CEXTB",
        "type": "passive",
        "description": "Connection for external nulling storage capacitor CEXTB (0.1µF for the internal clock), the other end going to CRETN."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The 8-pin pinout is labelled 'XL7650 (8 LD PDIP, SOIC)' and shared by the XD7650-8 DIP8; the DIP8 ma; The absolute maximum supply voltage value is missing from the text, and the operating range of 4.5V ",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 16,
        "cost_usd": 0.2845,
        "at": "2026-10-16T03:54:32"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756647084198113280",
        "pages": 16,
        "sha256": "39278cf2152486fa",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "xd7650-8.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          9.27,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4a377a56a8d9e9c0b86c095ef9ecc1869ac19e7f5069a3247b294250bf4f235d",
        "checked": "2026-10-16",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "xd7650-8-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
          7.874,
          9.27,
          6.98
        ],
        "zmin_mm": -3.3,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e4f1d5963c893bf44e0cec158497793457b857796ceed6959709b8f5a5aac446",
        "checked": "2026-10-16",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}