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XD74LS48

Public Made by Adom

by adom

XINLUDA LED Display Drivers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdisplay modules - led drivers - display driversxd74ls48factory-2.0.0extractor-text
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Symbol & Footprint

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Contents

README

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XD74LS48

XINLUDA · LED Display Drivers · DIP-16

XD74LS48 from XINLUDA, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input BCD input B; input high-level max/low-level thresholds are VIH 2 V min and VIL 0.8 V max.
2 C input BCD input C; TTL-compatible input with VIH 2 V min and VIL 0.8 V max.
3 LT input Active-low lamp test input that turns on all segments when low and BI/RBO is high.
4 BI/RBO bidirectional Blanking input/ripple-blanking output; forcing it low blanks all outputs, and as an output it sources up to -500 µA high and sinks 3.2 mA low on the LS48.
5 RBI input Active-low ripple-blanking input for leading/trailing zero suppression, which blanks outputs when low with BCD 0 input.
6 D input BCD input D (most significant bit); TTL-compatible input with VIH 2 V min and VIL 0.8 V max.
7 A input BCD input A (least significant bit); TTL-compatible input with VIH 2 V min and VIL 0.8 V max.
8 GND power_in Ground reference for the supply and all voltage values.
9 e output Segment e output, active-high with internal pull-up on the LS48, sinking 6 mA low-level and sourcing -100 µA high-level.
10 d output Segment d output, active-high with internal pull-up on the LS48, sinking 6 mA low-level and sourcing -100 µA high-level.
11 c output Segment c output, active-high with internal pull-up on the LS48, sinking 6 mA low-level and sourcing -100 µA high-level.
12 b output Segment b output, active-high with internal pull-up on the LS48, sinking 6 mA low-level and sourcing -100 µA high-level.
13 a output Segment a output, active-high with internal pull-up on the LS48, sinking 6 mA low-level and sourcing -100 µA high-level.
14 g output Segment g output, active-high with internal pull-up on the LS48, sinking 6 mA low-level and sourcing -100 µA high-level.
15 f output Segment f output, active-high with internal pull-up on the LS48, sinking 6 mA low-level and sourcing -100 µA high-level.
16 VCC power_in Supply voltage, 4.75 V min, 5 V nominal, 5.25 V max, with 7 V absolute maximum.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-16
Category Display Modules / LED Drivers / Display Drivers
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 7
High-level output current a thru g IOH -100 μA a thru g 7
High-level output current BI/RBO IOH -500 μA BI/RBO 7
Low-level output current a thru g IOL 6 mA a thru g 7
Low-level output current BI/RBO IOL 3.2 mA BI/RBO 7
Operating free-air temperature TA 0 70 C 7
Supply voltage VCC 7 V 7
Input voltage VI 7 V 7
Operating free-air temperature range 0 70 C DIP package 7
Storage temperature range Tstg -65 150 C 7
High-level input voltage VIH 2 V 8
Low-level input voltage VIL 0.8 V 8
Input clamp voltage VIK -1.5 V VCC = MIN, II = −18 mA 8
High-level output voltage BI/RBO VOH 2.4 4.2 V VCC = MIN, VIL = 0.8 V, VIH = 2 V, IOH = −400 A 8
Output current a thru g and BI/RBO IO -1.3 -2 mA Vcc=MIN,VO=0.85V, Input conditions as for VOH 8
Low-level output voltage a thru g VOL 0.25 0.4 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 2 mA 8
Low-level output voltage a thru g VOL 0.35 0.5 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 6 mA 8
Low-level output voltage BI/RBO VOL 0.25 0.4 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 1.6 mA 8
Low-level output voltage BI/RBO VOL 0.35 0.5 V VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 3.2 mA 8
Input current at maximum input voltage II 0.1 mA Any input except BI/RBO, VCC = MAX, VI = 7 V 8
High-level input current IIH 20 A Any input except BI/RBO, VCC = MAX, VI = 2.7 V 8
Low-level input current, any input except BI/RBO IIL -0.4 mA VCC = MAX, VI = 0.4 V 8
Low-level input current BI/RBO IIL -1.2 mA VCC = MAX, VI = 0.4 V 8
Short-circuit output current BI/RBO IOS -0.3 -2 mA VCC = MAX 8
Supply current ICC 25 38 mA VCC = MAX 8
Propagation delay high-to-low from A input tPHL 100 ns CL=15 pF, RL=4kΩ, VCC = 5 V, TA = 25℃ 9
Propagation delay low-to-high from A input tPLH 100 ns CL=15 pF, RL=4kΩ, VCC = 5 V, TA = 25℃ 9
Propagation delay high-to-low (a-f only) from RBI input tPHL 100 ns CL=15 pF, RL=6kΩ, VCC = 5 V, TA = 25℃ 9
Propagation delay low-to-high (a-f only) from RBI input tPLH 100 ns CL=15 pF, RL=6kΩ, VCC = 5 V, TA = 25℃ 9

CAD (KiCad official)

  • Symbol: XD74LS48
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: xd74ls48-etched.step / xd74ls48-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd74ls48.step / xd74ls48.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (10 pp, sha256 43904fa03e5f4a26, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF