XD74LS161

{
  "schema_version": 1,
  "type": "component",
  "slug": "xd74ls161",
  "title": "XD74LS161",
  "brief": "XINLUDA Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
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    "logic",
    "xd74ls161",
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  "component": {
    "mpn": "XD74LS161",
    "manufacturer": "XINLUDA",
    "package": "DIP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counters, Dividers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588916071566467073",
    "parts": {
      "symbol": "xd74ls161.kicad_sym",
      "footprint": "xd74ls161.kicad_mod",
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      "model_3d_step": "xd74ls161-etched.step",
      "model_3d_step_plain": "xd74ls161.step",
      "lbr": "xd74ls161.lbr"
    },
    "distributor_links": {
      "lcsc": "C609766"
    },
    "distributor_check": {
      "checked_at": "2026-10-15T17:56:27Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
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    },
    "pins": [
      {
        "number": "1",
        "name": "CLR",
        "type": "input",
        "description": "Active-low asynchronous clear; a low level sets all four flip-flop outputs low regardless of clock, load, or enable inputs on the 'LS161."
      },
      {
        "number": "2",
        "name": "CLK",
        "type": "input",
        "description": "Clock input; the four flip-flops are triggered on the rising edge of the clock waveform."
      },
      {
        "number": "3",
        "name": "A",
        "type": "input",
        "description": "Data input A (preset), loaded to QA synchronously when LOAD is low."
      },
      {
        "number": "4",
        "name": "B",
        "type": "input",
        "description": "Data input B (preset), loaded to QB synchronously when LOAD is low."
      },
      {
        "number": "5",
        "name": "C",
        "type": "input",
        "description": "Data input C (preset), loaded to QC synchronously when LOAD is low."
      },
      {
        "number": "6",
        "name": "D",
        "type": "input",
        "description": "Data input D (preset), loaded to QD synchronously when LOAD is low."
      },
      {
        "number": "7",
        "name": "ENP",
        "type": "input",
        "description": "Count-enable input P; together with ENT enables counting, and transitions are allowed regardless of clock level."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "9",
        "name": "LOAD",
        "type": "input",
        "description": "Active-low synchronous load; a low level disables counting and presets outputs to the data inputs after the next clock pulse regardless of enable levels."
      },
      {
        "number": "10",
        "name": "ENT",
        "type": "input",
        "description": "Count-enable input T; also enables the ripple carry output RCO, and transitions are allowed regardless of clock level."
      },
      {
        "number": "11",
        "name": "QD",
        "type": "output",
        "description": "Counter output D (most significant bit)."
      },
      {
        "number": "12",
        "name": "QC",
        "type": "output",
        "description": "Counter output C."
      },
      {
        "number": "13",
        "name": "QB",
        "type": "output",
        "description": "Counter output B."
      },
      {
        "number": "14",
        "name": "QA",
        "type": "output",
        "description": "Counter output A (least significant bit)."
      },
      {
        "number": "15",
        "name": "RCO",
        "type": "output",
        "description": "Ripple carry output giving a high pulse about equal to the high portion of QA when enabled by ENT, used to enable cascaded stages."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage, recommended 4.75 V to 5.25 V (5 V nominal), absolute maximum 7 V."
      }
    ],
    "provenance": {
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        "at": "2026-10-15T17:56:09"
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      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
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    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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        "units": "mm",
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "XINLUDA",
      "Package": "DIP-16",
      "Category": "Logic",
      "Pins": "16"
    },
    "characteristics": {
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          "min": 4.75,
          "typ": 5,
          "max": 5.25,
          "conditions": "",
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        {
          "name": "High-level output current",
          "symbol": "IOH",
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          "unit": "μA",
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          "name": "Setup time, CLR↑",
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        {
          "name": "Setup time, CLR inactive state",
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          "name": "Hold time at any input",
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        {
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          "unit": "V",
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          "typ": null,
          "max": 7,
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        {
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          "unit": "V",
          "min": null,
          "typ": null,
          "max": 7,
          "conditions": "74LS160, 74LS161, 74LS163",
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          "source": "datasheet"
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        {
          "name": "Operating free-air temperature range (DIP package)",
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        {
          "name": "Storage temperature range",
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          "min": -65,
          "typ": null,
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          "conditions": "",
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        {
          "name": "High-level input voltage",
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          "kind": "electrical",
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          "max": -1.5,
          "conditions": "VCC = MIN, I = −18 mA",
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        {
          "name": "High-level output voltage",
          "symbol": "VOH",
          "kind": "electrical",
          "unit": "V",
          "min": 2.7,
          "typ": 3.4,
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          "conditions": "VCC = MIN, VIL = 0.8 V, VIH = 2 V, IOH = −400 A",
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        {
          "name": "Low-level output voltage",
          "symbol": "VOL",
          "kind": "electrical",
          "unit": "V",
          "min": null,
          "typ": 0.25,
          "max": 0.4,
          "conditions": "VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 4 mA",
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        {
          "name": "Low-level output voltage",
          "symbol": "VOL",
          "kind": "electrical",
          "unit": "V",
          "min": null,
          "typ": 0.35,
          "max": 0.5,
          "conditions": "VCC = MIN, VIH = 2 V, VIL = VIL MAX, IOL = 8 mA",
          "source_page": 8,
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        },
        {
          "name": "Input current at maximum input voltage, Data or ENP",
          "symbol": "II",
          "kind": "electrical",
          "unit": "mA",
          "min": null,
          "typ": null,
          "max": 0.1,
          "conditions": "VCC = MAX, VI = 7 V",
          "source_page": 8,
          "source": "datasheet"
        },
        {
          "name": "Input current at maximum input voltage, LOAD, CLK or ENT",
          "symbol": "II",
          "kind": "electrical",
          "unit": "mA",
          "min": null,
          "typ": null,
          "max": 0.2,
          "conditions": "VCC = MAX, VI = 7 V",
          "source_page": 8,
          "source": "datasheet"
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        {
          "name": "Input current at maximum input voltage, CLR",
          "symbol": "II",
          "kind": "electrical",
          "unit": "mA",
          "min": null,
          "typ": null,
          "max": 0.1,
          "conditions": "VCC = MAX, VI = 7 V",
          "source_page": 8,
          "source": "datasheet"
        },
        {
          "name": "Input current at maximum input voltage, CLR (second row)",
          "symbol": "II",
          "kind": "electrical",
          "unit": "mA",
          "min": null,
          "typ": null,
          "max": 0.2,
          "conditions": "VCC = MAX, VI = 7 V",
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        {
          "name": "High-level input current, Data or ENP",
          "symbol": "IIH",
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          "unit": "μA",
          "min": null,
          "typ": null,
          "max": 20,
          "conditions": "VCC = MAX, VI = 2.7 V",
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          "name": "High-level input current, LOAD, CLK or ENT",
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          "name": "High-level input current, CLR",
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          "name": "High-level input current, CLR (second row)",
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          "conditions": "VCC = MAX, VI = 0.4 V",
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          "name": "Low-level input current, LOAD, CLK or ENT",
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          "name": "Low-level input current, CLR (second row)",
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          "name": "Short-circuit output current",
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          "kind": "electrical",
          "unit": "mA",
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          "typ": null,
          "max": -100,
          "conditions": "VCC = MAX",
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          "name": "Supply current, all outputs high",
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          "kind": "electrical",
          "unit": "mA",
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          "max": 31,
          "conditions": "VCC = MAX",
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        {
          "name": "Supply current, all outputs low",
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          "kind": "electrical",
          "unit": "mA",
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          "typ": 19,
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          "conditions": "VCC = MAX",
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        {
          "name": "Maximum clock frequency",
          "symbol": "fMAX",
          "kind": "timing",
          "unit": "MHz",
          "min": 25,
          "typ": 32,
          "max": null,
          "conditions": "VCC = 5 V, TA = 25°C",
          "source_page": 9,
          "source": "datasheet"
        },
        {
          "name": "Propagation delay low-to-high, CLK to RCO",
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        {
          "name": "Propagation delay high-to-low, CLK to RCO",
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          "typ": 18,
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          "name": "Propagation delay low-to-high, CLK to any Q (LOAD high)",
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          "conditions": "CL = 15 pF, RL = 2 kΩ, VCC = 5 V, TA = 25°C",
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          "name": "Propagation delay high-to-low, CLK to any Q (LOAD low)",
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          "name": "Propagation delay low-to-high, ENT to RCO",
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