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XD74LS154

XINLUDA · Signal Switches, Multiplexers, Decoders · DIP-24

XD74LS154 from XINLUDA, in a DIP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Y0 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
2 Y1 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
3 Y2 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
4 Y3 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
5 Y4 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
6 Y5 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
7 Y6 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
8 Y7 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
9 Y8 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
10 Y9 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
11 Y10 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
12 GND power_in Ground reference at 0 V for all voltages on the device.
13 Y11 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
14 Y12 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
15 Y13 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
16 Y14 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
17 Y15 output Active-LOW decoded data output; it is driven LOW when its address on A0 to A3 is selected while E0 and E1 are both LOW, and stays HIGH otherwise.
18 E0 input Active-LOW enable input; a HIGH on either E0 or E1 forces all outputs HIGH, and it can serve as the data input when the device is used as a demultiplexer.
19 E1 input Active-LOW enable input; a HIGH on either E0 or E1 forces all outputs HIGH, and it can serve as the data input when the device is used as a demultiplexer.
20 A3 input Binary-weighted address input that selects one of the sixteen outputs Y0 to Y15.
21 A2 input Binary-weighted address input that selects one of the sixteen outputs Y0 to Y15.
22 A1 input Binary-weighted address input that selects one of the sixteen outputs Y0 to Y15.
23 A0 input Binary-weighted address input that selects one of the sixteen outputs Y0 to Y15.
24 VCC power_in Supply voltage; the recommended operating range is 2.0 V to 6.0 V with 5.0 V typical.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-24
Category Logic
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 5
Input clamping current IIK -20 mA VI < 0.5 V or VI >VCC + 0.5 V [1] 5
Output clamping current IOK -20 mA VO < 0.5 V or VO >VCC + 0.5 V [1] 5
Output current IO -25 mA 0.5 V < VO <VCC + 0.5 V [1] 5
Supply current ICC -50 mA 5
Ground current IGND -50 mA 5
Storage temperature Tstg -65 150 C 5
Total power dissipation Ptot 300 mW Tamb = 40 C to +125 C [2] 5
Supply voltage VCC 2 5 6 V 5
Input voltage VI 0 V max = VCC 5
Output voltage VO 0 V max = VCC 5
Ambient temperature Tamb -40 25 125 C 5
Input transition rise and fall rate t/V 625 ns/V VCC = 2.0 V 5
Input transition rise and fall rate t/V 1.67 139 ns/V VCC = 4.5 V 5
Input transition rise and fall rate t/V 83 ns/V VCC = 6.0 V 5
HIGH-level input voltage VIH 1.5 1.2 V Tamb = 25 C; VCC = 2.0 V 6
HIGH-level input voltage VIH 3.15 2.4 V Tamb = 25 C; VCC = 4.5 V 6
HIGH-level input voltage VIH 4.2 3.2 V Tamb = 25 C; VCC = 6.0 V 6
LOW-level input voltage VIL 0.8 0.5 V Tamb = 25 C; VCC = 2.0 V 6
LOW-level input voltage VIL 2.1 1.35 V Tamb = 25 C; VCC = 4.5 V 6
LOW-level input voltage VIL 2.8 1.8 V Tamb = 25 C; VCC = 6.0 V 6
HIGH-level output voltage VOH 1.9 2 V Tamb = 25 C; VI = VIH or VIL; VCC = 2.0 V; IO = 20 A 6
HIGH-level output voltage VOH 4.4 4.5 V Tamb = 25 C; VI = VIH or VIL; VCC = 4.5 V; IO = 20 A 6
HIGH-level output voltage VOH 5.9 6 V Tamb = 25 C; VI = VIH or VIL; VCC = 6.0 V; IO = 20 A 6
HIGH-level output voltage VOH 3.98 4.32 V Tamb = 25 C; VI = VIH or VIL; VCC = 4.5 V; IO = 4.0 mA 6
HIGH-level output voltage VOH 5.48 5.81 V Tamb = 25 C; VI = VIH or VIL; VCC = 6.0 V; IO = 5.2 mA 6
LOW-level output voltage VOL 0 0.1 V Tamb = 25 C; VI = VIH or VIL; VCC = 2.0 V; IO = 20 A 6
LOW-level output voltage VOL 0.15 0.26 V Tamb = 25 C; VI = VIH or VIL; VCC = 4.5 V; IO = 4.0 mA 6
LOW-level output voltage VOL 0.16 0.26 V Tamb = 25 C; VI = VIH or VIL; VCC = 6.0 V; IO = 5.2 mA 6
Input leakage current II 0.1 µA Tamb = 25 C; VCC = 6.0 V; VI = VCC or GND 6
Supply current ICC 8 µA Tamb = 25 C; VCC = 6.0 V; VI = VCC or GND; IO = 0 A 6
HIGH-level input voltage VIH 1.5 V Tamb = 40 C to +85 C; VCC = 2.0 V 6
HIGH-level input voltage VIH 3.15 V Tamb = 40 C to +85 C; VCC = 4.5 V 6
HIGH-level input voltage VIH 4.2 V Tamb = 40 C to +85 C; VCC = 6.0 V 6
LOW-level input voltage VIL 0.5 V Tamb = 40 C to +85 C; VCC = 2.0 V 6
LOW-level input voltage VIL 1.35 V Tamb = 40 C to +85 C; VCC = 4.5 V 6
LOW-level input voltage VIL 1.8 V Tamb = 40 C to +85 C; VCC = 6.0 V 6
HIGH-level output voltage VOH 1.9 V Tamb = 40 C to +85 C; VI = VIH or VIL; VCC = 2.0 V; IO = 20 A 6
HIGH-level output voltage VOH 4.4 V Tamb = 40 C to +85 C; VI = VIH or VIL; VCC = 4.5 V; IO = 20 A 6
HIGH-level output voltage VOH 5.9 V Tamb = 40 C to +85 C; VI = VIH or VIL; VCC = 6.0 V; IO = 20 A 6
HIGH-level output voltage VOH 3.84 V Tamb = 40 C to +85 C; VI = VIH or VIL; VCC = 4.5 V; IO = 4.0 mA 6
HIGH-level output voltage VOH 5.34 V Tamb = 40 C to +85 C; VI = VIH or VIL; VCC = 6.0 V; IO = 5.2 mA 6
LOW-level output voltage VOL 0.1 V Tamb = 40 C to +85 C; VI = VIH or VIL; VCC = 2.0 V; IO = 20 A 7
LOW-level output voltage VOL 0.33 V Tamb = 40 C to +85 C; VI = VIH or VIL; VCC = 4.5 V; IO = 4.0 mA 7
Input leakage current II 1 µA Tamb = 40 C to +85 C; VCC = 6.0 V; VI = VCC or GND 7
Supply current ICC 80 µA Tamb = 40 C to +85 C; VCC = 6.0 V; VI = VCC or GND; IO = 0 A 7
Propagation delay An to Yn tpd 36 150 ns An to Yn; VCC = 2.0 V; Tamb = 25 C; CL = 50 pF 8
Propagation delay An to Yn tpd 13 30 ns An to Yn; VCC = 4.5 V; Tamb = 25 C; CL = 50 pF 8
Propagation delay An to Yn tpd 10 26 ns An to Yn; VCC = 6.0 V; Tamb = 25 C; CL = 50 pF 8
Propagation delay An to Yn tpd 190 ns An to Yn; VCC = 2.0 V; Tamb = 40 C to +85 C; CL = 50 pF 8
Propagation delay An to Yn tpd 38 ns An to Yn; VCC = 4.5 V; Tamb = 40 C to +85 C; CL = 50 pF 8
Propagation delay An to Yn tpd 33 ns An to Yn; VCC = 6.0 V; Tamb = 40 C to +85 C; CL = 50 pF 8
Transition time tt 19 75 ns VCC = 2.0 V; Tamb = 25 C; CL = 50 pF 8
Transition time tt 7 15 ns VCC = 4.5 V; Tamb = 25 C; CL = 50 pF 8
Transition time tt 6 13 ns VCC = 6.0 V; Tamb = 25 C; CL = 50 pF 8

CAD (KiCad official)

  • Symbol: XD74LS154
  • Footprint: Package_DIP:DIP-24_W7.62mm
  • 3D model: DIP-24 (KiCad packages3D, STEP)
  • 3D model files: xd74ls154-etched.step / xd74ls154-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd74ls154.step / xd74ls154.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (11 pp, sha256 9daf1088fb486a03, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF