main
Ray Set visibility: public a5685d1 7d ago
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{
  "schema_version": 1,
  "type": "component",
  "slug": "xd74ls132",
  "title": "XD74LS132",
  "brief": "XINLUDA Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "extractor-text"
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    "mpn": "XD74LS132",
    "manufacturer": "XINLUDA",
    "package": "DIP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914387923456000",
    "parts": {
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      "footprint": "xd74ls132.kicad_mod",
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      "model_3d_plain": "xd74ls132-etched.glb",
      "model_3d_step": "xd74ls132-etched.step",
      "model_3d_step_plain": "xd74ls132.step",
      "lbr": "xd74ls132.lbr"
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    "distributor_links": {
      "lcsc": "C561283"
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    "distributor_check": {
      "checked_at": "2026-10-16T10:36:56Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
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      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Gate 1 Schmitt-trigger NAND input A."
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      {
        "number": "2",
        "name": "1B",
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        "description": "Gate 1 Schmitt-trigger NAND input B."
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        "name": "1Y",
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        "description": "Gate 1 NAND output, rated for IOL 8 mA and IOH -0.4 mA."
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      {
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      {
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        "name": "2Y",
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        "type": "power_in",
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        "number": "8",
        "name": "3Y",
        "type": "output",
        "description": "Gate 3 NAND output, rated for IOL 8 mA and IOH -0.4 mA."
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        "description": "Gate 3 Schmitt-trigger NAND input A."
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        "description": "Gate 4 Schmitt-trigger NAND input A."
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        "name": "VCC",
        "type": "power_in",
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        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
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        "at": "2026-10-16T10:36:39"
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        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
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    "specs": {
      "Manufacturer": "XINLUDA",
      "Package": "DIP-14",
      "Category": "Logic",
      "Pins": "14"
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          "max": -0.4,
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          "typ": 3.4,
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          "conditions": "VCC = MIN, VIL = MAX, IOH = −0.4 mA",
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        {
          "name": "Low-level output voltage",
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          "typ": 0.35,
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          "source_page": 4,
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        },
        {
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  "author": {
    "name": "Ray",
    "email": "[email protected]"
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