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XD74LS132

Public Made by Adom

by adom

XINLUDA Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XD74LS132

XINLUDA · Logic Gates · DIP-14

XD74LS132 from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 Schmitt-trigger NAND input A.
2 1B input Gate 1 Schmitt-trigger NAND input B.
3 1Y output Gate 1 NAND output, rated for IOL 8 mA and IOH -0.4 mA.
4 2A input Gate 2 Schmitt-trigger NAND input A.
5 2B input Gate 2 Schmitt-trigger NAND input B.
6 2Y output Gate 2 NAND output, rated for IOL 8 mA and IOH -0.4 mA.
7 GND power_in Ground, the 0 V reference for the supply and inputs.
8 3Y output Gate 3 NAND output, rated for IOL 8 mA and IOH -0.4 mA.
9 3A input Gate 3 Schmitt-trigger NAND input A.
10 3B input Gate 3 Schmitt-trigger NAND input B.
11 4Y output Gate 4 NAND output, rated for IOL 8 mA and IOH -0.4 mA.
12 4A input Gate 4 Schmitt-trigger NAND input A.
13 4B input Gate 4 Schmitt-trigger NAND input B.
14 VCC power_in Supply voltage, recommended 4.75 V to 5.25 V (5 V nominal), absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 4
High-level output current IOH -0.4 mA 4
Low-level output current IOL 8 mA 4
Operating free-air temperature TA 0 70 C 4
Positive-going threshold voltage VT+ 1.4 1.6 1.9 V VCC = 5V 4
Negative-going threshold voltage VT- 0.5 0.8 1 V VCC = 5V 4
Hysteresis (VT+ - VT-) Vhys 0.4 0.8 V VCC = 5V 4
Input clamp voltage VIK -1.5 V VCC = MIN, II = −18 mA 4
High-level output voltage VOH 2.7 3.4 V VCC = MIN, VIL = MAX, IOH = −0.4 mA 4
Low-level output voltage VOL 0.25 0.4 V VCC = MIN, VIH = 2 V, IOL = 4 mA 4
Low-level output voltage VOL 0.35 0.5 V VCC = MIN, VIH = 2 V, IOL = 8 mA 4
Positive-going input current IT+ -0.14 mA VCC = 5V, VI = VT+ 4
Negative-going input current IT- -0.18 mA VCC = 5V, VI = VT- 4
Input current at maximum input voltage II 0.1 mA VCC = MAX, VI = 7 V 4
High-level input current IIH 20 µA VCC = MAX, VI = 2.7 V 4
Low-level input current IIL -0.4 mA VCC = MAX, VI = 0.4 V 4
Short-circuit output current IOS -20 -100 mA VCC = MAX 4
Supply current, outputs high ICCH 5.9 11 mA VCC = MAX 4
Supply current, outputs low ICCL 8.2 14 mA VCC = MAX 4
Propagation delay time, low-to-high-level output (Any to Y) tPLH 15 22 ns RL = 2 kΩ, CL = 15 pF 4
Propagation delay time, high-to-low-level output (Any to Y) tPHL 15 22 ns RL = 2 kΩ, CL = 15 pF 4
Supply voltage VCC 7 V 3
Input voltage VI 7 V 74LS132 3
Operating free-air temperature range 0 70 C DIP package 3
Storage temperature range Tstg -65 150 C 3

CAD (KiCad official)

  • Symbol: XD74LS132
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: xd74ls132-etched.step / xd74ls132-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd74ls132.step / xd74ls132.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (8 pp, sha256 4a62387e9bcfc442, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF