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XD74LS04

Public Made by Adom

by adom

XINLUDA Inverters, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XD74LS04

XINLUDA · Inverters · DIP-14

XD74LS04 from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input of inverter 1; VIH min 2 V, VIL max 0.8 V.
2 1Y output Output of inverter 1 (Y = NOT A); IOH -0.4 mA, IOL 8 mA max.
3 2A input Input of inverter 2; VIH min 2 V, VIL max 0.8 V.
4 2Y output Output of inverter 2 (Y = NOT A); IOH -0.4 mA, IOL 8 mA max.
5 3A input Input of inverter 3; VIH min 2 V, VIL max 0.8 V.
6 3Y output Output of inverter 3 (Y = NOT A); IOH -0.4 mA, IOL 8 mA max.
7 GND power_in Ground (0 V) reference for the device.
8 4Y output Output of inverter 4 (Y = NOT A); IOH -0.4 mA, IOL 8 mA max.
9 4A input Input of inverter 4; VIH min 2 V, VIL max 0.8 V.
10 5Y output Output of inverter 5 (Y = NOT A); IOH -0.4 mA, IOL 8 mA max.
11 5A input Input of inverter 5; VIH min 2 V, VIL max 0.8 V.
12 6Y output Output of inverter 6 (Y = NOT A); IOH -0.4 mA, IOL 8 mA max.
13 6A input Input of inverter 6; VIH min 2 V, VIL max 0.8 V.
14 VCC power_in Supply voltage, 4.75 V min, 5 V nominal, 5.25 V max.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 3
High-level input voltage VIH 2 V 3
Low-level input voltage VIL 0.8 V 3
High-level output current IOH -0.4 mA 3
Low-level output current IOL 8 mA 3
Operating free-air temperature TA 0 70 C 3
Input clamp voltage VIK -1.5 V VCC = MIN, II = -18 mA 3
High-level output voltage VOH 2.7 3.4 V VCC = MIN, VIL = MAX, IOH = -0.4 mA 3
Low-level output voltage VOL 0.4 V VCC = MIN, VIH = 2 V, IOL = 4 mA 3
Low-level output voltage VOL 0.25 0.5 V VCC = MIN, VIH = 2 V, IOL = 8 mA 3
Input current at maximum input voltage II 0.1 mA VCC = MAX, VI = 7 V 3
High-level input current IIH 20 μA VCC = MAX, VI = 2.7 V 3
Low-level input current IIL -0.4 mA VCC = MAX, VI = 0.4 V 3
Short-circuit output current IOS -20 -100 mA VCC = MAX 3
Supply current, outputs high ICCH 1.2 2.4 mA VCC = MAX, VI = 0 V 3
Supply current, outputs low ICCL 3.6 6.6 mA VCC = MAX, VI = 4.5 V 3
Propagation delay time, high-to-low level output tPHL 10 15 ns VCC = 5 V, TA = 25C; RL = 2 k, CL = 15 pF (input A, output Y) 3
Package thermal impedance, DIP package θJA 80 C/W DIP package (see Note 2) 3
Storage temperature range Tstg -65 150 C 3

CAD (KiCad official)

  • Symbol: XD74LS04
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: xd74ls04-etched.step / xd74ls04-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd74ls04.step / xd74ls04.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (7 pp, sha256 2041eb179d0e33d5, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF