main
History Download
Ray Publish 0.1.0 5d03e46 7d ago

XD74LS00

XINLUDA · Logic Gates · DIP-14

XD74LS00 from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A; VIH min 2.0 V, VIL max 0.8 V.
2 1B input Gate 1 input B; VIH min 2.0 V, VIL max 0.8 V.
3 1Y output Gate 1 NAND output; IOL max 8 mA, IOH max -400 µA.
4 2A input Gate 2 input A; VIH min 2.0 V, VIL max 0.8 V.
5 2B input Gate 2 input B; VIH min 2.0 V, VIL max 0.8 V.
6 2Y output Gate 2 NAND output; IOL max 8 mA, IOH max -400 µA.
7 GND power_in Ground reference for the device.
8 3Y output Gate 3 NAND output; IOL max 8 mA, IOH max -400 µA.
9 3A input Gate 3 input A; VIH min 2.0 V, VIL max 0.8 V.
10 3B input Gate 3 input B; VIH min 2.0 V, VIL max 0.8 V.
11 4Y output Gate 4 NAND output; IOL max 8 mA, IOH max -400 µA.
12 4A input Gate 4 input A; VIH min 2.0 V, VIL max 0.8 V.
13 4B input Gate 4 input B; VIH min 2.0 V, VIL max 0.8 V.
14 VCC power_in Supply voltage, recommended 4.75 V to 5.25 V (5.00 V typ).

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.75 5 5.25 V 2
Output current (high) IOH -400 A 2
Output current (low) IOL 8 mA 2
Operating temperature Topr 0 25 70 C 2
Input voltage VIN 7 V 2
Power dissipation PT 400 mW 2
Storage temperature Tstg -50 150 C 2
Input voltage high VIH 2 V 2
Input voltage low VIL 0.8 V 2
Output voltage high VOH 2.7 V VCC = 4.75 V, VIL = 0.8 V, IOH = - 400 A 2
Output voltage low VOL 0.5 V IOL = 8 mA 2
Output voltage low VOL 0.4 V VCC = 4.75 V, VIH = 2 V, IOL = 4 mA 2
Input current high IIH 20 A VCC = 5.25 V, VI = 2.7 V 2
Input current low IIL -0.4 mA VCC = 5.25 V, VI = 0.4 V 2
Input current II 0.1 mA VCC = 5.25 V, VI = 7 V 2
Short-circuit output current IOS -20 -100 mA VCC = 5.25 V 2
Supply current (output high) ICCH 1 3 mA VCC = 5.25 V 2
Supply current (output low) ICCL 2.6 6 mA VCC = 5.25 V 2
Input clamp voltage VIK -1.5 V VCC = 4.75 V, IIN = -18 mA 2
Propagation delay time low-to-high tPLH 12 25 ns CL = 15 pF, RL = 2 k 2
Propagation delay time high-to-low tPHL 13 25 ns 2

CAD (KiCad official)

  • Symbol: XD74LS00
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: xd74ls00-etched.step / xd74ls00-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd74ls00.step / xd74ls00.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (4 pp, sha256 602e3a139663942e, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF