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XD71055

XINLUDA · I/O Expanders · DIP-40

XD71055 from XINLUDA, in a DIP-40. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P03 bidirectional Port 0 I/O bit 3.
2 P02 bidirectional Port 0 I/O bit 2.
3 P01 bidirectional Port 0 I/O bit 1.
4 P00 bidirectional Port 0 I/O bit 0.
5 RD input Active-low read strobe input, set low when data is being read from the XD71055 data bus.
6 CS input Active-low chip select input; when high the device is not selected and its data bus is high-impedance.
7 GND power_in Ground.
8 A1 input Address input 1, used with RD and WR to select one of the three ports or the command register.
9 A0 input Address input 0, used with RD and WR to select one of the three ports or the command register.
10 P27 bidirectional Port 2 I/O bit 7.
11 P26 bidirectional Port 2 I/O bit 6.
12 P25 bidirectional Port 2 I/O bit 5.
13 P24 bidirectional Port 2 I/O bit 4.
14 P20 bidirectional Port 2 I/O bit 0.
15 P21 bidirectional Port 2 I/O bit 1.
16 P22 bidirectional Port 2 I/O bit 2.
17 P23 bidirectional Port 2 I/O bit 3.
18 P10 bidirectional Port 1 I/O bit 0.
19 P11 bidirectional Port 1 I/O bit 1.
20 P12 bidirectional Port 1 I/O bit 2.
21 P13 bidirectional Port 1 I/O bit 3.
22 P14 bidirectional Port 1 I/O bit 4.
23 P15 bidirectional Port 1 I/O bit 5.
24 P16 bidirectional Port 1 I/O bit 6.
25 P17 bidirectional Port 1 I/O bit 7.
26 VDD power_in +5V supply (single +5V ±10% power supply).
27 D7 bidirectional Bit 7 of the 8-bit three-state bidirectional data bus.
28 D6 bidirectional Bit 6 of the 8-bit three-state bidirectional data bus.
29 D5 bidirectional Bit 5 of the 8-bit three-state bidirectional data bus.
30 D4 bidirectional Bit 4 of the 8-bit three-state bidirectional data bus.
31 D3 bidirectional Bit 3 of the 8-bit three-state bidirectional data bus.
32 D2 bidirectional Bit 2 of the 8-bit three-state bidirectional data bus.
33 D1 bidirectional Bit 1 of the 8-bit three-state bidirectional data bus.
34 D0 bidirectional Bit 0 of the 8-bit three-state bidirectional data bus.
35 RESET input Reset input; when high the device is reset, ports are set to mode 0, all port bits are cleared to zero and all ports are set for input.
36 WR input Active-low write strobe input; data bus contents are written to the device at the rising edge of WR.
37 P07 bidirectional Port 0 I/O bit 7.
38 P06 bidirectional Port 0 I/O bit 6.
39 P05 bidirectional Port 0 I/O bit 5.
40 P04 bidirectional Port 0 I/O bit 4.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-40
Category Interface ICs
Pins 40

CAD (KiCad official)

  • Symbol: XD71055
  • Footprint: Package_DIP:DIP-40_W25.4mm
  • 3D model: DIP-40 (KiCad packages3D, STEP)
  • 3D model files: xd71055-etched.step / xd71055-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd71055.step / xd71055.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (18 pp, sha256 48de84ac665be88b, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF