component
XD62783
Public Made by Adomby adom
XINLUDA Darlington Transistor Arrays, DIP-18. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| xd62783-etched.step | 16d ago |
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XD62783
XINLUDA · Darlington Transistor Arrays · DIP-18
XD62783 from XINLUDA, in a DIP-18. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I1 | input | Input pin for channel 1; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 2 | I2 | input | Input pin for channel 2; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 3 | I3 | input | Input pin for channel 3; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 4 | I4 | input | Input pin for channel 4; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 5 | I5 | input | Input pin for channel 5; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 6 | I6 | input | Input pin for channel 6; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 7 | I7 | input | Input pin for channel 7; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 8 | I8 | input | Input pin for channel 8; VIN(ON) minimum is 2.0 V and VIN(OFF) maximum is 0.6 V, with absolute maximum input voltage of 30 V. |
| 9 | VCC | power_in | Power supply pin; operating supply range is 2.0 V to 50 V, with 50 V maximum. |
| 10 | GND | power_in | Ground pin for the device. |
| 11 | O8 | output | Output pin for channel 8; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
| 12 | O7 | output | Output pin for channel 7; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
| 13 | O6 | output | Output pin for channel 6; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
| 14 | O5 | output | Output pin for channel 5; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
| 15 | O4 | output | Output pin for channel 4; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
| 16 | O3 | output | Output pin for channel 3; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
| 17 | O2 | output | Output pin for channel 2; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
| 18 | O1 | output | Output pin for channel 1; DMOS output rated for -500 mA maximum per channel, with a built-in clamp diode for inductive loads. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-18 |
| Category | Transistors/Thyristors |
| Pins | 18 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC | -0.5 | 50 | V | 4 | ||
| Output current (for each channel) | IOUT | -500 | mA | 4 | |||
| Input voltage | VIN | -0.5 | 30 | V | 4 | ||
| Clamp diode reverse voltage | VR | 50 | V | 4 | |||
| Clamp diode forward current | IF | 500 | mA | 4 | |||
| Power dissipation DIP18 (Note1) | PD | 1.2 | W | Device alone; derate 12 mW/°C when Ta exceeds 25°C | 4 | ||
| Operating temperature | Topr | -40 | 85 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| Power supply voltage | VCC | 2 | 50 | V | IOUT = -100 mA | 5 | |
| Output current (for each channel), DIP18, 1 circuit ON | IOUT | 0 | -390 | mA | 1 circuit ON, Ta = 25°C, tpw = 25 ms | 5 | |
| Output current (for each channel), DIP18, 8 circuits ON, Duty 10% | IOUT | 0 | -380 | mA | 8 circuits ON, Ta = 85°C, Tj = 120°C, Duty = 10% | 5 | |
| Output current (for each channel), DIP18, 8 circuits ON, Duty 50% | IOUT | 0 | -160 | mA | 8 circuits ON, Ta = 85°C, Tj = 120°C, Duty = 50% | 5 | |
| Input voltage (output on) | VIN (ON) | 2 | 25 | V | IOUT = -100 mA or upper, VDS = 2.0 V | 5 | |
| Input voltage (output off) | VIN (OFF) | 0 | 0.6 | V | IOUT = -100 μA or less, VDS = 2.0 V | 5 | |
| Clamp diode forward current | IF | 350 | mA | 5 | |||
| Output leakage current | Ileak | 2 | μA | VCC = 50 V, VIN = 0 V, Ta = 85°C | 6 | ||
| Output voltage (output ON-resistance), IOUT = -350 mA, voltage | VDS (RON) | 0.7 | 1.5 | V | IOUT = -350 mA, VIN = 5.0 V, VCC = 5.0 V | 6 | |
| Output ON-resistance (value in parentheses), IOUT = -350 mA | VDS (RON) | 1.6 | 3.25 | Ω | IOUT = -350 mA, VIN = 5.0 V, VCC = 5.0 V | 6 | |
| Output voltage (output ON-resistance), IOUT = -200 mA, voltage | VDS (RON) | 0.5 | 0.9 | V | IOUT = -200 mA, VIN = 5.0 V, VCC = 5.0 V | 6 | |
| Output ON-resistance (value in parentheses), IOUT = -200 mA | VDS (RON) | 1.6 | 3.25 | Ω | IOUT = -200 mA, VIN = 5.0 V, VCC = 5.0 V | 6 | |
| Output voltage (output ON-resistance), IOUT = -100 mA, voltage | VDS (RON) | 0.3 | 0.7 | V | IOUT = -100 mA, VIN = 5.0 V, VCC = 5.0 V | 6 | |
| Output ON-resistance (value in parentheses), IOUT = -100 mA | VDS (RON) | 1.6 | 3.25 | Ω | IOUT = -100 mA, VIN = 5.0 V, VCC = 5.0 V | 6 | |
| Input current (output on) | IIN (ON) | 0.2 | mA | VIN = 2.0 V | 6 | ||
| Input current (output off) | IIN (OFF) | 3 | μA | VIN = 0 V, Ta = 85°C | 6 | ||
| Input voltage (output on) | VIN (ON) | 2 | V | IOUT = -100 mA or upper, VDS = 2.0 V | 6 | ||
| Supply current (for each channel) | ICC | 2 | mA | VIN = 2.0 V, VCC = 50 V, Output open | 6 | ||
| Clamp diode reverse current | IR | 5 | μA | VR = 50 V, Ta = 85°C | 6 | ||
| Clamp diode forward voltage | VF | 2 | V | IF = 350 mA | 6 |
CAD (KiCad official)
- Symbol:
XD62783 - Footprint:
Package_DIP:DIP-18_W7.62mm - 3D model: DIP-18 (KiCad packages3D, STEP)
- 3D model files:
xd62783-etched.step/xd62783-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xd62783.step/xd62783.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (10 pp, sha256
c7dd3114c5c4d730, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).