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XD3846

Public Made by Adom

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XINLUDA AC-DC Controllers And Regulators, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XD3846

XINLUDA · AC-DC Controllers And Regulators · DIP-16

XD3846 from XINLUDA, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C/S SS input Current limit/soft-start programming pin; soft-start sink current is rated at -40 mA maximum.
2 VREF power_out 5.1-V reference voltage output (4.85 to 5.35 V at 1 mA) that needs a 1 to 2.2 µF external capacitor and is rated at -25 mA maximum output current.
3 C/S- input Current sense comparator inverting input, with analog input range -0.3 V to +VIN.
4 C/S+ input Current sense comparator non-inverting input, with analog input range -0.3 V to +VIN and differential signal kept below 1.2 V.
5 E/A+ input Error amplifier non-inverting input (the pin table calls it inverting, but the layout guidelines call E/A+ non-inverting), with analog input range -0.3 V to +VIN.
6 E/A- input Error amplifier inverting input, with analog input range -0.3 V to +VIN.
7 COMP bidirectional Error amplifier output and input to the PWM comparator, with output current rated at -5 mA maximum.
8 CT input Oscillator frequency programming capacitor pin, with a ceramic CT placed close to the device and returned to GND.
9 RT input Oscillator frequency programming resistor pin (labelled CR in the pin table, RT elsewhere), with oscillator charging current rated at 5 mA maximum and RT connected to GND.
10 SYNC bidirectional Synchronization output from a master controller or input of a slave controller, with output current rated at -5 mA maximum.
11 A Out output PWM drive signal output A, complementary to pin 14, with 400 mA maximum source or sink current.
12 GND power_in Ground node to which all signals are referenced.
13 VC power_in Bias supply input for the output stage, rated at 36 V maximum.
14 B Out output PWM drive signal output B, complementary to pin 11, with 400 mA maximum source or sink current.
15 VIN power_in Bias supply input, rated at 36 V maximum, with undervoltage lockout start-up threshold of 7.7 V min to 8.2 V max.
16 SHUTDOWN input External shutdown signal input; a signal above the 350 mV threshold (250 to 400 mV) fires the shutdown latch, and the input range is 0 to VIN.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-16
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (Pin 15) 36 V 4
Collector Supply Voltage (Pin 13) 36 V 4
Output Current, Source or Sink (Pins 11, 14) 400 mA 4
Analog Inputs (Pins 3, 4, 5, 6, 16) -0.3 V 4
Storage temperature, Tstg Tstg -65 150 °C 4
Power Dissipation at TA = 25°C 800 mW TA = 25°C 4
VREF terminal external capacitance 1 2.2 µF 4
Output Voltage 4.85 5.1 5.35 V TJ = 25°C, IO = 1 mA 5
Line Regulation 5 30 mV VIN = 8 V to 36 V 5
Load Regulation 3 20 mV IL = 1 mA to 10 mA 5
Total Output Variation (Line, Load, and Temperature) 4.75 5.5 V Line, Load, and Temperature 5
Short Circuit Output Current -35 -10 mA VREF = 0 V 5
Oscillator Initial Accuracy 34 43 51 kHz TJ = 25°C 5
Oscillator Voltage Stability -1 3 % VIN = 8 V to 36 V 5
Sync Output High Level 3.9 4.35 V 5
Sync Output Low Level 2.3 2.5 V 5
Sync Input Current 1.3 1.5 mA Sync Voltage = 3.9 V, Pin 8 = 0 V 5
Error Amplifier Input Offset Voltage 0.5 20 mV 5
Error Amplifier Input Bias Current -0.6 -2 µA 5
Error Amplifier Input Offset Current 40 250 nA 5
Error Amplifier Common Mode Range 0 V VIN = 8 V to 36 V 5
Error Amplifier Open Loop Voltage Gain 80 105 dB ΔVO = 1.2 to 3 V, VCM = 2 V 5
Error Amplifier Unity Gain Bandwidth 0.5 0.7 MHz TJ = 25°C 5
Error Amplifier CMRR 60 85 dB VCM = 0 V to 36 V, VIN = 36 V 5
Error Amplifier PSRR 65 80 dB VIN = 8 V to 36 V 5
Error Amplifier Output Sink Current 2 6 mA VID = -15 mV to -5 V, VPIN7 = 1.2 V 5
Error Amplifier Output Source Current -0.5 -0.4 mA VID = 15 mV to -5 V, VPIN7 = 2.5 V 5
Error Amplifier High Level Output Voltage (Pin 7) 4.3 4.6 V RL = 15 kΩ 5
Error Amplifier Low Level Output Voltage (Pin 7) 0.7 1 V RL = 15 kΩ 5
Current Sense Amplifier Gain G 2.4 2.75 3.2 V VPIN 3 = 0 V, Pin 1 Open 5
Maximum Differential Input Signal (VPIN 4 - VPIN 3) 1.1 1.2 V Pin 1 Open; RL (Pin 7) = 15 kW 6
Current Sense Input Offset Voltage 5 25 mV VPIN 1 = 0.5 V, Pin 7 Open 6
Current Sense CMRR 60 75 dB VCM = 1 V to 12 V 6
Current Sense PSRR 60 70 dB VIN = 8 V to 36 V 6
Current Sense Input Bias Current -2.5 -10 µA VPIN 1 = 0.5 V, Pin 7 Open 6
Current Sense Input Offset Current 0.08 1 µA VPIN 1 = 0.5 V, Pin 7 Open 6
Current Sense Input Common Mode Range 0 V 6
Current Sense Delay to Outputs 300 700 ns TJ = 25°C 6
Current Limit Offset 0.45 0.5 0.55 V VPIN 3 = 0 V, VPIN 4 = 0 V, Pin 7 Open 6
Current Limit Adjust Input Bias Current -10 -30 µA VPIN 5 = VREF, VPIN 6 = 0 V 6
Shutdown Threshold Voltage 250 350 400 mV 6
Shutdown Input Voltage Range 0 V 6
Minimum Latching Current (IPIN1) IPIN1 3 1.5 mA 6
Maximum Latching Current (IPIN1) IPIN1 1.5 0.8 mA 6
Shutdown Delay to Outputs 300 600 ns TJ = 25°C 6
Output Low Level 0.1 0.4 V ISINK = 20 mA 6
Output Low Level 0.4 2.1 V ISINK = 100 mA 6
Output High Level 13 13.5 V ISOURCE = 20 mA 6
Output High Level 12 13.5 V ISOURCE = 100 mA 6
Output Rise Time 50 300 ns CL = 1 nF, TJ = 25°C 6
Output Fall Time 50 300 ns CL = 1 nF, TJ = 25°C 6
Undervoltage Lockout Start-Up Threshold 7.7 8.2 V 6
Total Standby Current Supply Current 18 23 mA 6
Reference Temperature Stability 0.5 mV/°C Over operating range 5
Sync Input High Level 3.9 V Pin 8 = 0 V 5
Sync Input Low Level 2.5 V Pin 8 = 0 V 5
Output Collector-Emitter Voltage 30 V 6
Output Collector Leakage Current 200 µA VC = 30 V 6
Junction-to-ambient thermal resistance (DIP16) RθJA 46 °C/W 4

CAD (KiCad official)

  • Symbol: XD3846
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: xd3846-etched.step / xd3846-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd3846.step / xd3846.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (16 pp, sha256 6f1f2cb1359f753e, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF