# XD3403

**XINLUDA** · Audio Amplifiers · DIP-14

XD3403 from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Output of amplifier 1, short-circuit protected, with output range that includes the negative supply. |
| 2 | IN1- | input | Inverting input of amplifier 1 (true differential input; common-mode range includes the negative supply). |
| 3 | IN1+ | input | Non-inverting input of amplifier 1 (true differential input; common-mode range includes the negative supply). |
| 4 | VCC | power_in | Positive supply, 3.0 V to 36 V single supply or +1.5 V to +18 V split supply (absolute maximum 36 V single, ±18 V split). |
| 5 | IN2+ | input | Non-inverting input of amplifier 2 (true differential input). |
| 6 | IN2- | input | Inverting input of amplifier 2 (true differential input). |
| 7 | OUT2 | output | Output of amplifier 2, short-circuit protected. |
| 8 | OUT3 | output | Output of amplifier 3, short-circuit protected. |
| 9 | IN3- | input | Inverting input of amplifier 3 (true differential input). |
| 10 | IN3+ | input | Non-inverting input of amplifier 3 (true differential input). |
| 11 | VEE/GND | power_in | Negative supply or ground for single-supply operation; -1.5 V to -18 V in split-supply operation. |
| 12 | IN4+ | input | Non-inverting input of amplifier 4 (true differential input). |
| 13 | IN4- | input | Inverting input of amplifier 4 (true differential input). |
| 14 | OUT4 | output | Output of amplifier 4, short-circuit protected. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Single Supply Voltage | VCC |  |  | 36 | Vdc | Single supply | 2 |
| Split Supplies Voltage | VCC,VEE |  |  | 18 | Vdc | Split supplies | 2 |
| Input Differential Voltage Range | VIDR |  |  | 36 | Vdc | Note 1 | 2 |
| Input Common Mode Voltage Range | VICR |  |  | 18 | Vdc | Notes 1 and 2 | 2 |
| Storage Temperature Range | Tstg | -55 |  | 125 | C |  | 2 |
| Operating Ambient Temperature Range (XD3403) | TA | 0 |  | 70 | C |  | 2 |
| Junction Temperature | TJ |  |  | 150 | C |  | 2 |
| Input Offset Voltage | VIO |  | 2 | 10 | mV |  | 3 |
| Input Offset Voltage | VIO |  |  | 12 | mV | TA = Thigh to Tlow (Note 3) | 3 |
| Input Offset Current | IIO |  | 30 | 50 | nA |  | 3 |
| Input Offset Current | IIO |  |  | 200 | nA | TA = Thigh to Tlow | 3 |
| Large Signal Open Loop Voltage Gain | AVOL | 20 | 200 |  | V/mV | VO = 10 V, RL = 2.0 kΩ | 3 |
| Large Signal Open Loop Voltage Gain | AVOL | 15 |  |  | V/mV | VO = 10 V, RL = 2.0 kΩ, TA = Thigh to Tlow | 3 |
| Input Bias Current | IIB |  | -200 | -500 | nA |  | 3 |
| Input Bias Current | IIB |  |  | -800 | nA | TA = Thigh to Tlow | 3 |
| Input Impedance | zi | 0.3 | 1 |  | MΩ | f = 20 Hz | 3 |
| Output Voltage Range | VO | 12 | 13.5 |  | V | RL = 10 kΩ | 3 |
| Output Voltage Range | VO | 10 | 13 |  | V | RL = 2.0 kΩ | 3 |
| Output Voltage Range | VO | 10 |  |  | V | RL = 2.0 kΩ, TA = Thigh to Tlow | 3 |
| Input Common Mode Voltage Range | VICR |  |  | 13 | V |  | 3 |
| Common Mode Rejection | CMR | 70 | 90 |  | dB | RS 10 kΩ | 3 |
| Power Supply Current (VO = 0) | ICC, IEE |  | 2.8 | 7 | mA | VO = 0, RL = | 3 |
| Individual Output Short-Circuit Current | ISC | 10 | 20 | 45 | mA |  | 3 |
| Positive Power Supply Rejection Ratio | PSRR+ |  | 30 | 150 | µV/V |  | 3 |
| Negative Power Supply Rejection Ratio | PSRR− |  | 30 | 150 | µV/V |  | 3 |
| Crossover Distortion |  |  |  | 1 | % | Vin = 30 mVpp, Vout = 2.0 Vpp, f = 10 kHz | 3 |
| Input Offset Voltage | VIO |  | 2 | 10 | mV |  | 4 |
| Input Offset Current | IIO |  | 30 | 50 | nA |  | 4 |
| Input Bias Current | IIB |  | -200 | -500 | nA |  | 4 |
| Large Signal Open Loop Voltage Gain | AVOL | 10 | 200 |  | V/mV | RL = 2.0 kΩ | 4 |
| Power Supply Rejection Ratio | PSRR |  |  | 150 | µV/V |  | 4 |
| Output Voltage Range (VCC = 5.0 V) | VOR | 3.3 | 3.5 |  | Vpp | RL = 10 kΩ, VCC = 5.0 V | 4 |
| Power Supply Current | ICC |  | 2.5 | 7 | mA |  | 4 |

## CAD (KiCad official)

- Symbol: `XD3403`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `xd3403-etched.step` / `xd3403-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xd3403.step` / `xd3403.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XINLUDA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588896494426730496) (8 pp, sha256 `bce2c6fc487bc3f3`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xd3403-datasheet.pdf)