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Contents

README

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XD3232

XINLUDA · RS232 ICs · DIP-16

XD3232 from XINLUDA, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C1+ passive Positive lead of the C1 charge-pump capacitor.
2 V+ power_out Positive charge pump output for storage capacitor only (absolute max 7 V).
3 C1- passive Negative lead of the C1 charge-pump capacitor.
4 C2+ passive Positive lead of the C2 charge-pump capacitor.
5 C2- passive Negative lead of the C2 charge-pump capacitor.
6 V- power_out Negative charge pump output for storage capacitor only (absolute max -7 V).
7 DOUT2 output RS232 line data output of driver 2 (to remote RS232 system), with ±15 kV HBM ESD protection.
8 RIN2 input RS232 line data input of receiver 2 (from remote RS232 system), with 5 kΩ nominal input resistance and ±25 V input range.
9 ROUT2 output Logic data output of receiver 2 (to UART); an open input gives a high output.
10 DIN2 input Logic data input of driver 2 (from UART); must be tied to a valid high or low level.
11 DIN1 input Logic data input of driver 1 (from UART); must be tied to a valid high or low level.
12 ROUT1 output Logic data output of receiver 1 (to UART); an open input gives a high output.
13 RIN1 input RS232 line data input of receiver 1 (from remote RS232 system), with 5 kΩ nominal input resistance and ±25 V input range.
14 DOUT1 output RS232 line data output of driver 1 (to remote RS232 system), with ±15 kV HBM ESD protection.
15 GND power_in Ground.
16 VCC power_in Supply voltage, connect to external 3-V to 5.5-V power supply (absolute max 6 V).

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-16
Category Interface ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (VCC=3.3V) VCC 3 3.3 3.6 V VCC = 3.3V 5
Supply voltage (VCC=5V) VCC 4.5 5 5.5 V VCC = 5V 5
Driver high-level input voltage (3.3V) VIH 2 V VCC = 3.3V, DIN 5
Driver high-level input voltage (5V) VIH 2.4 V VCC = 5V, DIN 5
Driver low-level input voltage VIL 0.8 V DIN 5
Driver input voltage VI 0 5.5 V DIN 5
Receiver input voltage VI -25 25 V RIN 5
Operating free-air temperature TA -40 85 °C XD3232 5
Supply current ICC 0.5 10 mA No load, VCC = 3.3 V or 5 V 5
Driver high-level output voltage VOH 5 5.4 V DOUT at RL = 3 kΩ to GND, DIN = GND 5
Driver low-level output voltage VOL -5.4 -5 V DOUT at RL = 3 kΩ to GND, DIN = VCC 5
Driver high-level input current IIH 0.01 1 μA VI = VCC 5
Driver low-level input current IIL 0.01 1 μA VI at GND 5
Short-circuit output current IOS 35 60 mA VCC = 3.6 V, VO = 0 V; VCC = 5.5 V, VO = 0 V 5
Driver output resistance rO 300 Ω VCC, V+, and V- = 0 V, VO = ±2 V 5
Receiver low-level output voltage VOL 0.4 V IOL = 1.6 mA 6
Receiver input hysteresis Vhys 0.3 V VIT+, VIT- 6
Receiver input resistance ri 3 5 7 kΩ VI = ±3 V to ±25 V 6
Maximum data rate 150 250 kbit/s RL = 3 kΩ, One DOUT switching, CL = 1000 pF 6
Driver pulse skew tsk(p) 300 ns RL = 3 kΩ to 7 kΩ, CL = 150 pF to 2500 pF 6
Driver slew rate SR(tr) 6 30 V/μs RL = 3 kΩ to 7 kΩ, VCC = 3.3 V, CL = 150 pF to 1000 pF 6
Driver slew rate SR(tr) 4 30 V/μs RL = 3 kΩ to 7 kΩ, VCC = 3.3 V, CL = 150 pF to 2500 pF 6
Receiver propagation delay low-to-high tPLH 300 ns CL = 150 pF 6
Receiver propagation delay high-to-low tPHL 300 ns CL = 150 pF 6
Receiver pulse skew tsk(p) 300 ns 6
Supply voltage VCC -0.3 6 V 4
Positive output supply voltage V+ -0.3 7 V 4
Negative output supply voltage V- -7 0.3 V 4
Supply voltage difference V+, V- 13 V 4
Input voltage, drivers VI -0.3 6 V Drivers 4
Input voltage, receivers VI -25 25 V Receivers 4
Output voltage, drivers VO -13.2 13.2 V Drivers 4
Output voltage, receivers VO -0.3 V Receivers, max VCC + 0.3 V 4
Operating virtual junction temperature TJ 125 °C 4
Storage temperature Tstg -45 150 °C 4
Junction-to-ambient thermal resistance RθJA 66.6 °C/W XD (DIP) 16 pins 4
Junction-to-case (top) thermal resistance RθJCtop 32.4 °C/W XD (DIP) 16 pins 4
Junction-to-board thermal resistance RθJB 31.9 °C/W XD (DIP) 16 pins 4

CAD (KiCad official)

  • Symbol: XD3232
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: xd3232-etched.step / xd3232-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xd3232.step / xd3232.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (15 pp, sha256 746b01f367b01497, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF