component
XD13700
Public Made by Adomby adom
XINLUDA Operational Amplifier, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXD13700
XINLUDA · Operational Amplifier · DIP-16
XD13700 from XINLUDA, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Amp bias input | input | Amplifier bias current input (IABC) for one amplifier; the datasheet gives the bias pin voltage as 2 VBE above V- and limits the absolute maximum amplifier bias current to 2 mA. |
| 2 | Diode bias | input | Linearizing diode bias input for one amplifier; the absolute maximum diode bias current is 2 mA and 1 mA is recommended for ID. |
| 3 | Input+ | input | Positive differential input of one transconductance amplifier; the differential input voltage is limited to ±5 V. |
| 4 | Input- | input | Negative differential input of one transconductance amplifier; the differential input voltage is limited to ±5 V. |
| 5 | Output | output | Unbuffered output of one transconductance amplifier; it can sustain a continuous short to ground, with peak output current of 350 to 650 µA at IABC = 500 µA and RL = 0. |
| 6 | V- | power_in | Negative power supply; in dual-supply configuration V- is specified from −16 V to −4.75 V. |
| 7 | Buffer input | input | Input of one output buffer amplifier; buffer input current is 0.5 µA typical and 2 µA maximum. |
| 8 | Buffer output | output | Output of one buffer amplifier; buffer output current is limited to 20 mA and must not exceed package dissipation. |
| 9 | Buffer output | output | Output of one buffer amplifier; buffer output current is limited to 20 mA and must not exceed package dissipation. |
| 10 | Buffer input | input | Input of one output buffer amplifier; buffer input current is 0.5 µA typical and 2 µA maximum. |
| 11 | V+ | power_in | Positive power supply; V+ is specified from 9.5 V to 32 V single-supply or 4.75 V to 16 V dual-supply. |
| 12 | Output | output | Unbuffered output of the second transconductance amplifier; it can sustain a continuous short to ground, with peak output current of 350 to 650 µA at IABC = 500 µA and RL = 0. |
| 13 | Input- | input | Negative differential input of the second transconductance amplifier; the differential input voltage is limited to ±5 V. |
| 14 | Input+ | input | Positive differential input of the second transconductance amplifier; the differential input voltage is limited to ±5 V. |
| 15 | Diode bias | input | Linearizing diode bias input for the second amplifier; the absolute maximum diode bias current is 2 mA and 1 mA is recommended for ID. |
| 16 | Amp bias input | input | Amplifier bias current input (IABC) for the second amplifier; the datasheet gives the bias pin voltage as 2 VBE above V- and limits the absolute maximum amplifier bias current to 2 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-16 |
| Category | Amplifiers/Comparators |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | 36 | VDC | Printed as 36 VDC or ±18 V | 3 | |||
| Differential input voltage | -5 | 5 | V | 3 | |||
| Diode bias current | ID | 2 | mA | 3 | |||
| Amplifier bias current | IABC | 2 | mA | 3 | |||
| Buffer output current | 20 | mA | Should be limited so as not to exceed package dissipation | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Supply voltage V+ (single-supply configuration) | V+ | 9.5 | 32 | V | Single-supply configuration | 3 | |
| Supply voltage V+ (dual-supply configuration) | V+ | 4.75 | 16 | V | Dual-supply configuration | 3 | |
| Supply voltage V- (dual-supply configuration) | V- | -16 | -4.75 | V | Dual-supply configuration | 3 | |
| Operating temperature | TA | -40 | 85 | °C | XD13700 temperature range per ordering information | 29 | |
| Input offset voltage over specified temperature range | VOS | 0.4 | 4 | mV | Over specified temperature range | 4 | |
| Input offset voltage at IABC = 5 µA | VOS | 0.3 | 4 | mV | IABC = 5 µA | 4 | |
| VOS including diodes | VOS | 0.5 | 5 | mV | Diode bias current (ID) = 500 µA | 4 | |
| Input offset change | 0.1 | 3 | mV | 5 µA ≤ IABC ≤ 500 µA | 4 | ||
| Input offset current | 0.1 | 0.6 | µA | 4 | |||
| Input bias current | 0.4 | 5 | µA | 4 | |||
| Input bias current over specified temperature range | 1 | 8 | µA | Over specified temperature range | 4 | ||
| Forward transconductance | gm | 6700 | 9600 | 13000 | µS | 4 | |
| Forward transconductance over specified temperature range | gm | 5400 | µS | Over specified temperature range | 4 | ||
| Peak output current | 350 | 500 | 650 | µA | RL = 0, IABC = 500 µA | 4 | |
| Peak output current over specified temperature range | 300 | µA | RL = 0, Over Specified Temp Range | 4 | |||
| CMRR | 80 | 110 | dB | 4 | |||
| Common-mode range | 12 | 13.5 | V | 4 | |||
| Input resistance | 10 | 26 | kΩ | 4 | |||
| Peak output voltage positive | 12 | 14.2 | V | RL = ∞, 5 µA ≤ IABC ≤ 500 µA | 4 | ||
| Peak output voltage negative | -12 | -14.4 | V | RL = ∞, 5 µA ≤ IABC ≤ 500 µA | 4 | ||
| VOS sensitivity positive | ΔVOS/ΔV+ | 20 | 150 | µV/V | 4 | ||
| VOS sensitivity negative | ΔVOS/ΔV- | 20 | 150 | µV/V | 4 | ||
| Peak output current at IABC = 5 µA | 5 | µA | RL = 0, IABC = 5 µA | 4 | |||
| Supply current | 2.6 | mA | IABC = 500 µA, both channels | 4 | |||
| Crosstalk | 100 | dB | Referred to input, 20 Hz < f < 20 kHz | 4 | |||
| Differential input current | 0.02 | 100 | nA | IABC = 0, input = ±4 V | 4 | ||
| Leakage current | 0.2 | 100 | nA | IABC = 0 (refer to test circuit) | 4 | ||
| gm tracking | 0.3 | dB | 4 | ||||
| Open-loop bandwidth | 2 | MHz | 4 | ||||
| Slew rate | 50 | V/µs | Unity gain compensated | 4 | |||
| Buffer input current | 0.5 | 2 | µA | See note (1): VS = ±15 V, IABC = 500 µA, ROUT = 5 kΩ to −VS | 4 | ||
| Peak buffer output voltage | 10 | V | See note (1): VS = ±15 V, IABC = 500 µA, ROUT = 5 kΩ to −VS | 4 | |||
| Thermal resistance junction-to-ambient (PDIP) | RθJA | 43.8 | °C/W | NFG (PDIP) 16-pin package | 3 | ||
| Thermal resistance junction-to-case top (PDIP) | RθJC(top) | 34.9 | °C/W | NFG (PDIP) 16-pin package | 3 | ||
| Thermal resistance junction-to-board (PDIP) | RθJB | 28.3 | °C/W | NFG (PDIP) 16-pin package | 3 | ||
| Junction-to-top characterization parameter (PDIP) | ψJT | 19.1 | °C/W | NFG (PDIP) 16-pin package | 3 | ||
| Junction-to-board characterization parameter (PDIP) | ψJB | 28.2 | °C/W | NFG (PDIP) 16-pin package | 3 |
CAD (KiCad official)
- Symbol:
XD13700 - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files:
xd13700-etched.step/xd13700-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xd13700.step/xd13700.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (30 pp, sha256
f3088e9a2186d09a, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).