# XD07

**XINLUDA** · Precision OpAmps · DIP-8

XD07 from XINLUDA, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OFFSET N1 | input | External input offset voltage adjustment pin (adjustable ±4 mV with a 20 kΩ potentiometer between N1 and N2, wiper to V+). |
| 2 | IN- | input | Inverting input of the amplifier. |
| 3 | IN+ | input | Noninverting input of the amplifier. |
| 4 | V- | power_in | Negative supply, operating range ±3 V to ±18 V dual supply (or GND for single supply). |
| 5 | NC | unconnected | Do not connect. |
| 6 | OUT | output | Amplifier output, typical swing ±12.8 V (±11.5 V min) at VS = ±15 V. |
| 7 | V+ | power_in | Positive supply, operating range ±3 V to ±18 V dual supply (6 V to 36 V single supply). |
| 8 | OFFSET N2 | input | External input offset voltage adjustment pin (adjustable ±4 mV with a 20 kΩ potentiometer between N1 and N2). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-8 |
| Category | Amplifiers |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage, single supply | VS |  |  | 40 | V | Single supply | 3 |
| Supply voltage, dual supply | VS | -20 |  | 20 | V | Dual supply (±20) | 3 |
| Input voltage, differential |  | -28 |  | 28 | V | Differential | 3 |
| Input voltage, single-ended |  | -20 |  | 20 | V | Single-ended | 3 |
| Operating junction temperature | TJ | -40 |  | 85 | °C |  | 3 |
| Storage temperature | Tstg | -55 |  | 125 | °C |  | 3 |
| ESD HBM | V(ESD) | -1000 |  | 1000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 |
| ESD CDM | V(ESD) | -1000 |  | 1000 | V | Charged-device model, JESD22-C101 | 4 |
| Supply voltage, single supply | VS | 6 |  | 36 | V | Single supply | 4 |
| Supply voltage, dual supply | VS | -18 |  | 18 | V | Dual supply (±3 to ±18) | 4 |
| Common-mode input voltage | VCM | -13 |  | 13 | V | VS = ±15 V | 4 |
| Operating ambient temperature | TA | -40 |  | 85 | °C |  | 4 |
| Junction-to-ambient thermal resistance | RθJA |  | 85 |  | °C/W | P (DIP) 8 pins | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 68.6 |  | °C/W | P (DIP) 8 pins | 4 |
| Junction-to-board thermal resistance | RθJB |  | 55.6 |  | °C/W | P (DIP) 8 pins | 4 |
| Junction-to-top characterization parameter | ψJT |  | 38.3 |  | °C/W | P (DIP) 8 pins | 4 |
| Junction-to-board characterization parameter | ψJB |  | 55.2 |  | °C/W | P (DIP) 8 pins | 4 |
| Input offset voltage | VOS | -60 |  | 60 | μV | XD07, TA = 25°C, VS = ±15 V | 4 |
| Input offset voltage over temperature | VOS | -85 |  | 85 | μV | XD07, TA = -40°C to 85°C | 4 |
| Input offset voltage drift | dVOS/dT | -0.5 |  | 0.5 | μV/°C | XD07, TA = -40°C to 85°C | 4 |
| Input bias current | IB | -1.8 |  | 1.8 | nA | XD07 | 4 |
| Input bias current over temperature | IB | -2.2 |  | 2.2 | nA | XD07, TA = -40°C to 85°C | 4 |
| Input bias current drift |  | -18 |  | 18 | pA/°C | XD07 | 4 |
| Input offset current | IOS | -0.8 |  | 0.8 | nA | XD07 | 4 |
| Input offset current over temperature | IOS | -1.6 |  | 1.6 | nA | XD07, TA = -40°C to 85°C | 4 |
| Offset adjustment range |  |  | 4 |  | mV | Rs = 20 kΩ (±4) | 4 |
| Power supply rejection ratio | PSRR |  | 7 | 32 | μV/V | VS = ±3 V to ±18 V | 4 |
| Power supply rejection ratio over temperature | PSRR |  | 10 | 51 | μV/V | VS = ±3 V to ±18 V, TA = -40°C to 85°C | 4 |
| Common-mode voltage | VCM | 13 | 14 |  | V | ±13 min, ±14 typ | 5 |
| Common-mode voltage over temperature | VCM | 13 | 13.5 |  | V | TA = -40°C to 85°C | 5 |
| Common-mode rejection ratio | CMRR | 100 | 120 |  | dB | XD07, VCM = ±13 V | 5 |
| Common-mode rejection ratio over temperature | CMRR | 97 | 120 |  | dB | XD07, TA = -40°C to 85°C | 5 |
| Open-loop voltage gain | AOL | 100 | 400 |  | V/mV | XD07, 1.4 V < VO < 11.4 V, RL = 500 kΩ | 5 |
| Input resistance | rI | 7 | 33 |  | MΩ |  | 5 |
| Voltage output swing |  | 11.5 | 12.8 |  | V | ±11.5 min, ±12.8 typ | 5 |
| Voltage output swing over temperature |  | 11 | 12.6 |  | V | TA = -40°C to 85°C | 5 |
| Power dissipation | PD |  | 80 | 150 | mW | No load | 5 |
| Power dissipation, VS = ±3 V | PD |  | 4 | 8 | mW | VS = ±3 V, no load | 5 |
| Long-term drift of input offset voltage |  |  | 0.4 |  | µV/mo | ±0.4 | 4 |
| Input offset current drift |  |  | 12 |  | pA/°C | XD07 | 4 |
| Unity gain bandwidth |  |  | 0.4 | 0.6 | MHz |  | 5 |
| Slew rate | SR |  | 0.3 |  | V/μs | VS = 5 V, RL = 2 kΩ | 5 |
| Input voltage noise |  |  | 0.38 |  | μVPP | f = 0.1 Hz to 10 Hz | 5 |
| Input voltage noise density | eN |  | 9.8 |  | nV/√Hz | f = 1 kHz | 5 |

## CAD (KiCad official)

- Symbol: `XD07`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `xd07-etched.step` / `xd07-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xd07.step` / `xd07.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XINLUDA datasheet](docs/xd07-datasheet.pdf) (12 pp, sha256 `2050b4534c9afc01`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xd07-datasheet.pdf)