component
XC9572XL-10VQG64C
Public Made by Adomby adom
AMD XILINX Programmable Logic Device (CPLDs/FPGAs), LQFP-64(10x10). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
xc9572xl-10vqg64c: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
e25a11d
1d ago
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{
"schema_version": 1,
"type": "component",
"slug": "xc9572xl-10vqg64c",
"title": "XC9572XL-10VQG64C",
"brief": "AMD XILINX Programmable Logic Device (CPLDs/FPGAs), LQFP-64(10x10). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"xc9572xl-10vqg64c"
],
"component": {
"mpn": "XC9572XL-10VQG64C",
"manufacturer": "AMD XILINX",
"package": "LQFP-64(10x10)",
"pin_count": 64,
"category": "Embedded Processors & Controllers",
"subcategory": "Programmable Logic Device (CPLDs/FPGAs)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918541681119233",
"parts": {
"symbol": "xc9572xl-10vqg64c.kicad_sym",
"footprint": "xc9572xl-10vqg64c.kicad_mod",
"model_3d": "xc9572xl-10vqg64c-etched.glb",
"model_3d_plain": "xc9572xl-10vqg64c.glb",
"model_3d_step": "xc9572xl-10vqg64c-etched.step",
"model_3d_step_plain": "xc9572xl-10vqg64c.step",
"lbr": "xc9572xl-10vqg64c.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "IO_FB2_MC10",
"type": "bidirectional",
"description": "User I/O tied to Function Block 2, Macrocell 10. 5 V / 3.3 V / 2.5 V tolerant, referenced to VCCIO."
},
{
"number": "2",
"name": "IO_GTS2_FB2_MC11",
"type": "bidirectional",
"description": "User I/O with global tri-state control GTS2 alternate function (FB2, MC11). Global control pin."
},
{
"number": "3",
"name": "VCCINT",
"type": "power_in",
"description": "3.3 V core supply (VCCINT). Range 3.0-3.6 V."
},
{
"number": "4",
"name": "IO_FB2_MC12",
"type": "bidirectional",
"description": "User I/O (FB2, MC12)."
},
{
"number": "5",
"name": "IO_GTS1_FB2_MC14",
"type": "bidirectional",
"description": "User I/O with global tri-state control GTS1 alternate function (FB2, MC14) on VQ64."
},
{
"number": "6",
"name": "IO_FB2_MC15",
"type": "bidirectional",
"description": "User I/O (FB2, MC15)."
},
{
"number": "7",
"name": "IO_FB2_MC17",
"type": "bidirectional",
"description": "User I/O (FB2, MC17)."
},
{
"number": "8",
"name": "IO_FB1_MC2",
"type": "bidirectional",
"description": "User I/O (FB1, MC2)."
},
{
"number": "9",
"name": "IO_FB1_MC5",
"type": "bidirectional",
"description": "User I/O (FB1, MC5)."
},
{
"number": "10",
"name": "IO_FB1_MC6",
"type": "bidirectional",
"description": "User I/O (FB1, MC6)."
},
{
"number": "11",
"name": "IO_FB1_MC8",
"type": "bidirectional",
"description": "User I/O (FB1, MC8)."
},
{
"number": "12",
"name": "IO_FB1_MC3",
"type": "bidirectional",
"description": "User I/O (FB1, MC3)."
},
{
"number": "13",
"name": "IO_FB1_MC4",
"type": "bidirectional",
"description": "User I/O (FB1, MC4)."
},
{
"number": "14",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V)."
},
{
"number": "15",
"name": "IO_GCK1_FB1_MC9",
"type": "bidirectional",
"description": "User I/O with global clock GCK1 alternate function (FB1, MC9). Drives the global clock network. Global control pin."
},
{
"number": "16",
"name": "IO_GCK2_FB1_MC11",
"type": "bidirectional",
"description": "User I/O with global clock GCK2 alternate function (FB1, MC11). Global control pin."
},
{
"number": "17",
"name": "IO_GCK3_FB1_MC14",
"type": "bidirectional",
"description": "User I/O with global clock GCK3 alternate function (FB1, MC14). Global control pin."
},
{
"number": "18",
"name": "IO_FB1_MC10",
"type": "bidirectional",
"description": "User I/O (FB1, MC10)."
},
{
"number": "19",
"name": "IO_FB1_MC15",
"type": "bidirectional",
"description": "User I/O (FB1, MC15)."
},
{
"number": "20",
"name": "IO_FB1_MC17",
"type": "bidirectional",
"description": "User I/O (FB1, MC17)."
},
{
"number": "21",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V)."
},
{
"number": "22",
"name": "IO_FB3_MC2",
"type": "bidirectional",
"description": "User I/O (FB3, MC2)."
},
{
"number": "23",
"name": "IO_FB1_MC12",
"type": "bidirectional",
"description": "User I/O (FB1, MC12)."
},
{
"number": "24",
"name": "IO_FB3_MC5",
"type": "bidirectional",
"description": "User I/O (FB3, MC5)."
},
{
"number": "25",
"name": "IO_FB3_MC8",
"type": "bidirectional",
"description": "User I/O (FB3, MC8)."
},
{
"number": "26",
"name": "VCCIO",
"type": "power_in",
"description": "I/O bank supply (VCCIO). 3.0-3.6 V for 3.3 V I/O or 2.3-2.7 V for 2.5 V I/O; sets the output-driver rail."
},
{
"number": "27",
"name": "IO_FB3_MC9",
"type": "bidirectional",
"description": "User I/O (FB3, MC9)."
},
{
"number": "28",
"name": "TDI",
"type": "input",
"description": "IEEE 1149.1 JTAG Test Data In. Serial data input to the boundary-scan / ISP shift register."
},
{
"number": "29",
"name": "TMS",
"type": "input",
"description": "IEEE 1149.1 JTAG Test Mode Select. Drives the TAP controller state machine."
},
{
"number": "30",
"name": "TCK",
"type": "input",
"description": "IEEE 1149.1 JTAG Test Clock input. Clocks the boundary-scan / in-system programming interface."
},
{
"number": "31",
"name": "IO_FB3_MC3",
"type": "bidirectional",
"description": "User I/O (FB3, MC3)."
},
{
"number": "32",
"name": "IO_FB3_MC4",
"type": "bidirectional",
"description": "User I/O (FB3, MC4)."
},
{
"number": "33",
"name": "IO_FB3_MC11",
"type": "bidirectional",
"description": "User I/O (FB3, MC11)."
},
{
"number": "34",
"name": "IO_FB3_MC6",
"type": "bidirectional",
"description": "User I/O (FB3, MC6)."
},
{
"number": "35",
"name": "IO_FB3_MC14",
"type": "bidirectional",
"description": "User I/O (FB3, MC14)."
},
{
"number": "36",
"name": "IO_FB3_MC15",
"type": "bidirectional",
"description": "User I/O (FB3, MC15)."
},
{
"number": "37",
"name": "VCCINT",
"type": "power_in",
"description": "3.3 V core supply (VCCINT). Range 3.0-3.6 V."
},
{
"number": "38",
"name": "IO_FB3_MC17",
"type": "bidirectional",
"description": "User I/O (FB3, MC17)."
},
{
"number": "39",
"name": "IO_FB3_MC10",
"type": "bidirectional",
"description": "User I/O (FB3, MC10)."
},
{
"number": "40",
"name": "IO_FB3_MC12",
"type": "bidirectional",
"description": "User I/O (FB3, MC12)."
},
{
"number": "41",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V)."
},
{
"number": "42",
"name": "IO_FB3_MC16",
"type": "bidirectional",
"description": "User I/O (FB3, MC16)."
},
{
"number": "43",
"name": "IO_FB4_MC2",
"type": "bidirectional",
"description": "User I/O (FB4, MC2)."
},
{
"number": "44",
"name": "IO_FB4_MC5",
"type": "bidirectional",
"description": "User I/O (FB4, MC5)."
},
{
"number": "45",
"name": "IO_FB4_MC8",
"type": "bidirectional",
"description": "User I/O (FB4, MC8)."
},
{
"number": "46",
"name": "IO_FB4_MC3",
"type": "bidirectional",
"description": "User I/O (FB4, MC3)."
},
{
"number": "47",
"name": "IO_FB4_MC4",
"type": "bidirectional",
"description": "User I/O (FB4, MC4)."
},
{
"number": "48",
"name": "IO_FB4_MC11",
"type": "bidirectional",
"description": "User I/O (FB4, MC11)."
},
{
"number": "49",
"name": "IO_FB4_MC6",
"type": "bidirectional",
"description": "User I/O (FB4, MC6)."
},
{
"number": "50",
"name": "IO_FB4_MC14",
"type": "bidirectional",
"description": "User I/O (FB4, MC14)."
},
{
"number": "51",
"name": "IO_FB4_MC10",
"type": "bidirectional",
"description": "User I/O (FB4, MC10)."
},
{
"number": "52",
"name": "IO_FB4_MC12",
"type": "bidirectional",
"description": "User I/O (FB4, MC12)."
},
{
"number": "53",
"name": "TDO",
"type": "output",
"description": "IEEE 1149.1 JTAG Test Data Out. Serial data output from the boundary-scan / ISP shift register."
},
{
"number": "54",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V)."
},
{
"number": "55",
"name": "VCCIO",
"type": "power_in",
"description": "I/O bank supply (VCCIO). 3.0-3.6 V for 3.3 V I/O or 2.3-2.7 V for 2.5 V I/O."
},
{
"number": "56",
"name": "IO_FB4_MC15",
"type": "bidirectional",
"description": "User I/O (FB4, MC15)."
},
{
"number": "57",
"name": "IO_FB4_MC17",
"type": "bidirectional",
"description": "User I/O (FB4, MC17)."
},
{
"number": "58",
"name": "IO_FB2_MC3",
"type": "bidirectional",
"description": "User I/O (FB2, MC3)."
},
{
"number": "59",
"name": "IO_FB2_MC4",
"type": "bidirectional",
"description": "User I/O (FB2, MC4)."
},
{
"number": "60",
"name": "IO_FB2_MC2",
"type": "bidirectional",
"description": "User I/O (FB2, MC2)."
},
{
"number": "61",
"name": "IO_FB2_MC5",
"type": "bidirectional",
"description": "User I/O (FB2, MC5)."
},
{
"number": "62",
"name": "IO_FB2_MC6",
"type": "bidirectional",
"description": "User I/O (FB2, MC6)."
},
{
"number": "63",
"name": "IO_FB2_MC8",
"type": "bidirectional",
"description": "User I/O (FB2, MC8)."
},
{
"number": "64",
"name": "IO_GSR_FB2_MC9",
"type": "bidirectional",
"description": "User I/O with global set/reset GSR alternate function (FB2, MC9). Drives the asynchronous set/reset of all macrocell registers when configured. Global control pin."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918541681119233",
"pages": 10,
"sha256": "658863fc1c4034b9",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 64,
"described": 64,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "xc9572xl-10vqg64c.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "xc9572xl-10vqg64c-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
12.0,
12.0,
1.5
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "dce607fb412ae66c1844bfa16d061260d47b80e1d7b9fa490c7a6a6460ae672e",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "AMD XILINX",
"Package": "LQFP-64(10x10)",
"Category": "Embedded Processors & Controllers",
"Pins": "64"
}
},
"variants": [
{
"mpn": "XC9572XL-10VQG64CPC44",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CPCG44",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CVQ44",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CVQG44",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CCS48",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CCSG48",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CVQ64",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64C",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CTQ100",
"kind": "packaging"
},
{
"mpn": "XC9572XL-10VQG64CTQG100",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"xc9572xl-10vqg64c"
],
"discovery_pitch": "XC9572XL-10VQG64C (AMD XILINX) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"xc9572xl-10vqg64c.kicad_sym",
"xc9572xl-10vqg64c.kicad_mod",
"xc9572xl-10vqg64c.glb",
"xc9572xl-10vqg64c.step",
"xc9572xl-10vqg64c.lbr",
"docs/hero.png",
"docs/xc9572xl-10vqg64c-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-25T14:24:57.079Z"
}