XC7467

Si Change · Analog To Digital Converters (ADC) · SOT-23-6

XC7467 from Si Change, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Power supply input; the device operates from 1.5 V to 4.5 V, and the datasheet requires a 1 µF and 10 nF decoupling capacitor between VDD and GND placed as close to the pins as possible.
2	GND	power_in	Analog input signal ground; all analog and digital signals are referenced to this pin.
3	VIN	power_in	Single-ended unipolar analog signal input with an input range of 0 V to VDD.
4	SCLK	input	Serial clock input that clocks out the conversion data and sets the conversion clock source.
5	SDATA	output	Serial data output carrying the conversion result MSB first; the timing section states this line goes high-impedance after the 14th SCLK falling edge.
6	CS	input	Active-low chip select that frames the serial transfer, gates SCLK, and starts a conversion on its falling edge.

Key specifications

Parameter	Value
Manufacturer	Si Change
Package	SOT-23-6
Category	Data Acquisition
Pins	6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Max	Unit	Conditions	Page
Supply voltage	VDD	1.5	4.5	V	Single supply, pin VDD	2
Maximum sample rate			240	KSPS	VDD 1.5 V to 3.0 V	2
Maximum sample rate			1.2	MSPS	VDD 3.0 V to 4.5 V	2
Integral nonlinearity	INL	-0.5	0.5	LSB		2
Differential nonlinearity	DNL	-0.5	0.5	LSB		2
Operating temperature range		-40	85	℃		1

CAD (KiCad official)

Symbol: XC7467
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: SOT-23-6 (KiCad packages3D, STEP)
3D model files: xc7467-etched.step / xc7467-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xc7467.step / xc7467.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Si Change datasheet (4 pp, sha256 aecd5f5ff46fbd83, retrieved 2026-10-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# XC7467

**Si Change** · Analog To Digital Converters (ADC) · SOT-23-6

XC7467 from Si Change, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply input; the device operates from 1.5 V to 4.5 V, and the datasheet requires a 1 µF and 10 nF decoupling capacitor between VDD and GND placed as close to the pins as possible. |
| 2 | GND | power_in | Analog input signal ground; all analog and digital signals are referenced to this pin. |
| 3 | VIN | power_in | Single-ended unipolar analog signal input with an input range of 0 V to VDD. |
| 4 | SCLK | input | Serial clock input that clocks out the conversion data and sets the conversion clock source. |
| 5 | SDATA | output | Serial data output carrying the conversion result MSB first; the timing section states this line goes high-impedance after the 14th SCLK falling edge. |
| 6 | CS | input | Active-low chip select that frames the serial transfer, gates SCLK, and starts a conversion on its falling edge. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Si Change |
| Package | SOT-23-6 |
| Category | Data Acquisition |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 1.5 |  | 4.5 | V | Single supply, pin VDD | 2 |
| Maximum sample rate |  |  |  | 240 | KSPS | VDD 1.5 V to 3.0 V | 2 |
| Maximum sample rate |  |  |  | 1.2 | MSPS | VDD 3.0 V to 4.5 V | 2 |
| Integral nonlinearity | INL | -0.5 |  | 0.5 | LSB |  | 2 |
| Differential nonlinearity | DNL | -0.5 |  | 0.5 | LSB |  | 2 |
| Operating temperature range |  | -40 |  | 85 | ℃ |  | 1 |

## CAD (KiCad official)

- Symbol: `XC7467`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `xc7467-etched.step` / `xc7467-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xc7467.step` / `xc7467.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Si Change datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603387338085322752) (4 pp, sha256 `aecd5f5ff46fbd83`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xc7467-datasheet.pdf)