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XC6702D501PR-G

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Torex Semicon Linear Voltage Regulators (LDO), SOT-89-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XC6702D501PR-G

Torex Semicon · Linear Voltage Regulators (LDO) · SOT-89-5

XC6702D501PR-G from Torex Semicon, in a SOT-89-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output pin; the datasheet recommends a 2.2μF ceramic output capacitor (CL) and gives an output current of 300mA.
2 VSS power_in Ground pin of the regulator; all voltage ratings are relative to VSS.
3 CE input ON/OFF control input where L is stand-by, H is active and OPEN is unstable, so it should be set to a fixed voltage (absolute maximum -0.3 to 42.0V).
4 NC unconnected No connection pin.
5 VIN power_in Power input pin with an operating range of 4.5V to 36.0V (absolute maximum 42.0V).

Key specifications

Parameter Value
Manufacturer Torex Semicon
Package SOT-89-5
Category Power Supply Chip
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 4.5 36 V Ta=25C 5
Output Voltage (VOUT(T)=5.0V) VOUT(E) 4.95 5 5.05 V IOUT=10mA, Ta=25C 6
Output Voltage (VOUT(T)=5.0V) VOUT(E) 4.8 5 5.2 V IOUT=10mA, -40C<=Ta<=105C 6
Quiescent Current ISS 40 80 μA IOUT=0mA, Ta=25C 5
Quiescent Current ISS 40 90 μA IOUT=0mA, -40C<=Ta<=105C 5
Stand-by Current ISTB 0.01 0.1 μA VIN=36.0V, VCE=VSS, Ta=25C 5
Stand-by Current ISTB 0.01 2.1 μA VIN=36.0V, VCE=VSS, -40C<=Ta<=105C 5
Maximum Output Current IOUTMAX 300 mA VIN=VOUT(T)+2.0V, Ta=25C 5
Load Regulation ΔVOUT 60 85 mV VIN=VOUT(T)+2.0V, 0.1mA<=IOUT<=300mA, VOUT(T)<=5.0V, Ta=25C 5
Load Regulation ΔVOUT 60 230 mV VIN=VOUT(T)+2.0V, 0.1mA<=IOUT<=300mA, VOUT(T)<=5.0V, -40C<=Ta<=105C 5
Dropout Voltage Vdif 350 440 mV IOUT=100mA, Ta=25C 7
Dropout Voltage Vdif 350 810 mV IOUT=100mA, -40C<=Ta<=105C 7
Line Regulation ΔVOUT/(ΔVIN・VOUT) 0.01 0.03 %/V VOUT(T)+0.5V<=VIN<=36.0V 5
Output Voltage Temperature Characteristics ΔVOUT/(ΔTopr・VOUT) 50 ppm/℃ printed ±50 5
Ripple Rejection Ratio PSRR 65 dB VIN=VOUT(T)+1.0VDC+0.5Vp-pAC, IOUT=10mA, f=1kHz, CIN unconnected 5
Limit Current ILIM 370 460 mA VIN=VOUT(T)+2.0V, VOUT=VOUT(E)×0.95, Ta=25C 5
Limit Current ILIM 310 460 mA VIN=VOUT(T)+2.0V, VOUT=VOUT(E)×0.95, -40C<=Ta<=105C 5
Short-Circuit Current ISHORT 115 mA VOUT=VSS 5
Thermal Shutdown Detect Temperature TTSD 150 ℃ Junction Temperature 5
Thermal Shutdown Release Temperature TTSR 140 ℃ Junction Temperature 5
Thermal Shutdown Hysteresis Width TTSD-TTSR 10 ℃ Junction Temperature 5
Soft-Start Time tSS 370 890 μs VCE=0V→VIN, Ta=25C 5
Soft-Start Time tSS 370 1100 μs VCE=0V→VIN, -40C<=Ta<=105C 5
Inrush Current IRUSH 70 135 mA VCE=0V→VIN, 3.3V<VOUT(T)<=5.0V, Ta=25C 5
Inrush Current IRUSH 70 215 mA VCE=0V→VIN, 3.3V<VOUT(T)<=5.0V, -40C<=Ta<=105C 5
CE H Level Voltage VCEH 2.5 36 V 5
CE L Level Voltage VCEL 1.2 V min printed as VSS 5
CE H Level Current ICEH -0.1 0.1 μA VCE=VIN=36.0V 5
CE L Level Current ICEL -0.1 0.1 μA VIN=36.0V, VCE=VSS 5
Input Voltage (absolute maximum) VIN -0.3 42 V 4
Output Current (absolute maximum) IOUT 600 mA Use with IOUT less than Pd/(VIN-VOUT) 4
Output Voltage (absolute maximum) VOUT -0.3 42 V VIN + 0.3 or 42.0, lower of the two 4
CE Input Voltage (absolute maximum) VCE -0.3 42 V 4
Power Dissipation SOT-89-5 Pd 500 mW Ta=25C 4
Power Dissipation SOT-89-5, 40mm x 40mm board Pd 1300 mW Ta=25C, 40mm x 40mm Standard board 4
Power Dissipation SOT-89-5, JESD51-7 board Pd 1750 mW Ta=25C, JESD51-7 board 4
Surge Voltage VSURGE 46 V Transient <=400ms 4
Operating Ambient Temperature Topr -40 105 ℃ 4
Junction Temperature Tj -40 125 ℃ 4
Storage Temperature Tstg -55 125 ℃ 4
Recommended Input Capacitor CIN 1 μF MIN recommended, VOUT(T) 1.8V~18.0V 11
Recommended Output Capacitor CL 2.2 μF MIN recommended, VOUT(T) 1.8V~18.0V 11

CAD (KiCad official)

  • Symbol: XC6702D501PR-G
  • Footprint: Package_TO_SOT_SMD:SOT-89-5
  • 3D model: SOT-89-5 (KiCad packages3D, STEP)
  • 3D model files: xc6702d501pr-g-etched.step / xc6702d501pr-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xc6702d501pr-g.step / xc6702d501pr-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Torex Semicon datasheet (27 pp, sha256 4336f08615dfe3cd, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF