component
XC6221A302MR-G
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Torex Semicon Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownXC6221A302MR-G
Torex Semicon · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25-5
XC6221A302MR-G from Torex Semicon, in a SOT-25-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input for the regulator, operating from 1.6V to 6.0V, with absolute maximum rating VSS -0.3V to +6.5V; a 1.0µF input capacitor between VIN and VSS is recommended for stable input power. |
| 2 | VSS | power_in | Ground reference pin for the regulator. |
| 3 | CE | input | ON/OFF control where a high level of 1.2V to 6.0V enables the output and a low level of 0.3V or less shuts it down, with absolute maximum rating VSS -0.3V to +6.5V; on the XC6221A/B there is no internal pull-down and an open CE pin leaves the output unstable. |
| 4 | NC | unconnected | No connection on the SOT-25 package. |
| 5 | VOUT | power_out | Regulated output that delivers up to 200mA (250mA typ.), with absolute maximum rating VSS -0.3V to VIN +0.3V, and requires an output capacitor CL for phase compensation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Torex Semicon |
| Package | SOT-25-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Load Regulation | UVOUT | 10 | 40 | mV | VCE=VIN,0.1mA IOUT 100mA | 5 | |
| Supply Current | IDD | 25 | 50 | μA | VCE=VIN VIN= VOUT(T)+1.0V | 5 | |
| Standby Current | ISTB | 0.01 | 0.1 | μA | VIN=6.0V, VCE=VSS | 5 | |
| Line Regulation | UVOUT / (UVIN·VOUT) | 0.01 | 0.2 | %/V | VOUT(T)+0.5V VIN 6.0V; 1.10V VOUT(T), VCE=VIN, IOUT=10mA | 5 | |
| Output Current Limit / Output Current | IOUTMAX | 200 | 250 | mA | VCE=VIN,VIN=VOUT(T)+1.0V, 0.80V<VOUT(T)<5.00V | 5 | |
| Output Voltage Temperature Characteristics | UVOUT / (UTopr·VOUT) | -100 | 100 | ppm/°C | VCE=VIN, IOUT=30mA, -40<Topr<85 | 5 | |
| Ripple Rejection Rate (VOUT(T) 0.85V to 4.00V group) | PSRR | 60 | dB | VCE=VIN, IOUT=30mA, f=1kHz, VIN=VOUT(T)+1.0 VDC+0.5Vp-pAC, 0.85V VOUT(T) 4.00V | 5 | ||
| Limit Current | ILIM | 200 | 250 | mA | VCE=VIN | 5 | |
| CE High Level Voltage | VCEH | 1.2 | 6 | V | 5 | ||
| CE Low Level Voltage | VCEL | 0.3 | V | 5 | |||
| CE High Level Current (XC6221A/B) | ICEH | -0.1 | 0.1 | μA | VCE=VIN (XC6221A/B) | 5 | |
| CE Low Level Current | ICEL | -0.1 | 0.1 | μA | VCE=VSS | 5 | |
| Input Voltage | VIN | 1.6 | 6 | V | 5 | ||
| Input Voltage (absolute maximum) | VIN | -0.3 | 6.5 | V | Referenced to VSS | 4 | |
| Output Current | IOUT | 400 | mA | IOUT ≤ Pd / (VIN-VOUT) (*1) | 4 | ||
| Output Voltage (absolute maximum) | VOUT | -0.3 | V | Referenced to VSS; upper limit printed as VIN + 0.3 | 4 | ||
| CE Input Voltage (absolute maximum) | VCE | -0.3 | 6.5 | V | Referenced to VSS | 4 | |
| Power Dissipation SOT-25 (not mounted) | Pd | 250 | mW | Ta=25°C | 4 | ||
| Power Dissipation SOT-25 (PCB mounted) | Pd | 600 | mW | PCB mounted (*2) | 4 | ||
| Operating Ambient Temperature | Topr | -40 | 85 | °C | 4 | ||
| Storage Temperature | Tstg | -55 | 125 | °C | 4 | ||
| Output Capacitor CL (SOT-25, VOUT 1.40V to 4.00V) | CL | 1 | μF | Except USPN-4 package, output voltage 1.40V to 4.00V | 8 | ||
| Thermal Resistance SOT-25 (board mount) | 166.67 | °C/W | Board mount, Tj max = 125°C, natural convection, reference evaluation board | 22 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | The USPN-4 package has for terminals. Each terminal connects one copper block in the front and | 24 |
CAD (KiCad official)
- Symbol:
XC6221A302MR-G - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25-5 (KiCad packages3D, STEP)
- 3D model files:
xc6221a302mr-g-etched.step/xc6221a302mr-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xc6221a302mr-g.step/xc6221a302mr-g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Torex Semicon datasheet (28 pp, sha256
c5bad2e786b1d143, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).