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XC6209F182MR-G
Public Made by Adomby adom
Torex Semicon Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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XC6209F182MR-G
Torex Semicon · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
XC6209F182MR-G from Torex Semicon, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin with an operating input voltage of 2.0V to 10V and an absolute maximum rating of 12.0V referenced to VSS, with a 0.1µF input capacitor recommended between VIN and VSS. |
| 2 | VSS | power_in | Ground pin, and all voltages on the device are described relative to VSS; the output capacitor should be connected as close as possible to VOUT and VSS. |
| 3 | CE | input | ON/OFF control pin; for this Type F part it is active high with no internal pull-down, so CE must be driven to VIN or VSS (CE 'H' minimum 1.6V, CE 'L' maximum 0.25V) because leaving it open makes operation unstable. |
| 4 | NC | unconnected | No connection pin with no electrical function on this package. |
| 5 | VOUT | power_out | Regulated output pin; maximum output current is 300mA for Type F (depending on the set output voltage), and an output capacitor of at least 1µF should be connected close to this pin and VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Torex Semicon |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage (2% product, VOUT(T)=1.80V) | VOUT | 1.764 | 1.836 | V | 10 | ||
| Load Regulation | ΔVOUT | 15 | 50 | mV | 1mA≦IOUT≦100mA | 8 | |
| Load Regulation 2 | ΔVOUT2 | 100 | mV | 1mA≦IOUT≦300mA | 8 | ||
| Dropout Voltage 1 | Vdif1 | 300 | 310 | mV | IOUT=30mA | 10 | |
| Dropout Voltage 2 | Vdif2 | 400 | 450 | mV | IOUT=100mA | 10 | |
| Supply Current (Type F) | IDD | 25 | 50 | μA | VCE=VIN=VOUT(T)+1.0V; When VOUT≦0.95V, VCE=VIN=2.0V | 8 | |
| Stand-by Current | ISTB | 0.01 | 0.1 | μA | VIN=VOUT(T)+1.0V, VCE=VSS; When VOUT≦0.95V, VCE=VIN=2.0V | 8 | |
| Line Regulation | ΔVOUT/(ΔVIN･VOUT) | 0.01 | 0.2 | %/V | VOUT(T)+1.0V≦VIN≦10V; When VOUT≦0.95V, 2.0V≦VIN≦10V; IOUT=30mA; When VOUT≦1.75V, IOUT=10mA | 8 | |
| Input Voltage | VIN | 2 | 10 | V | 8 | ||
| CE "H" Level Voltage | VCEH | 1.6 | V | 8 | |||
| CE "L" Level Voltage | VCEL | 0.25 | V | 8 | |||
| CE "H" Level Current (Type F) | ICEH | -0.1 | 0.1 | μA | VIN=VCE=VOUT(T)+1.0V; When VOUT≦0.95V, VIN=VCE=2.0V | 8 | |
| CE "L" Level Current | ICEL | -0.1 | 0.1 | μA | VIN=VOUT(T)+1.0V, VCE=VSS; When VOUT≦0.95V, VIN=2.0V | 8 | |
| Input Voltage | VIN | 12 | V | Ta=25℃ | 5 | ||
| Output Current | IOUT | 500 | mA | *1: IOUT≦Pd/(VIN-VOUT) | 5 | ||
| Power Dissipation (SOT-25) | Pd | 250 | mW | SOT-25 | 5 | ||
| Power Dissipation (SOT-25, PCB mounted) | Pd | 600 | mW | SOT-25, PCB mounted (*2) | 5 | ||
| Operating Ambient Temperature | Topr | -40 | 85 | ℃ | 5 | ||
| Storage Temperature | Tstg | -55 | 125 | ℃ | 5 | ||
| Output Capacitor (CL) recommended value | CL | 1 | μF | Ceramic output capacitor connected close to VOUT and VSS pins | 13 | ||
| Thermal Resistance (SOT-25, board mount) | θJA | 166.67 | ℃/W | Board mount, 40×40mm FR-4 1.6mm, Cu 50%, natural convection | 25 |
CAD (KiCad official)
- Symbol:
XC6209F182MR-G - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files:
xc6209f182mr-g-etched.step/xc6209f182mr-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xc6209f182mr-g.step/xc6209f182mr-g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Torex Semicon datasheet (31 pp, sha256
575dcb9916c5c35f, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# XC6209F182MR-G
**Torex Semicon** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25
XC6209F182MR-G from Torex Semicon, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin with an operating input voltage of 2.0V to 10V and an absolute maximum rating of 12.0V referenced to VSS, with a 0.1µF input capacitor recommended between VIN and VSS. |
| 2 | VSS | power_in | Ground pin, and all voltages on the device are described relative to VSS; the output capacitor should be connected as close as possible to VOUT and VSS. |
| 3 | CE | input | ON/OFF control pin; for this Type F part it is active high with no internal pull-down, so CE must be driven to VIN or VSS (CE 'H' minimum 1.6V, CE 'L' maximum 0.25V) because leaving it open makes operation unstable. |
| 4 | NC | unconnected | No connection pin with no electrical function on this package. |
| 5 | VOUT | power_out | Regulated output pin; maximum output current is 300mA for Type F (depending on the set output voltage), and an output capacitor of at least 1µF should be connected close to this pin and VSS. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Torex Semicon |
| Package | SOT-25 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage (2% product, VOUT(T)=1.80V) | VOUT | 1.764 | | 1.836 | V | | 10 |
| Load Regulation | ΔVOUT | | 15 | 50 | mV | 1mA≦IOUT≦100mA | 8 |
| Load Regulation 2 | ΔVOUT2 | | | 100 | mV | 1mA≦IOUT≦300mA | 8 |
| Dropout Voltage 1 | Vdif1 | | 300 | 310 | mV | IOUT=30mA | 10 |
| Dropout Voltage 2 | Vdif2 | | 400 | 450 | mV | IOUT=100mA | 10 |
| Supply Current (Type F) | IDD | | 25 | 50 | μA | VCE=VIN=VOUT(T)+1.0V; When VOUT≦0.95V, VCE=VIN=2.0V | 8 |
| Stand-by Current | ISTB | | 0.01 | 0.1 | μA | VIN=VOUT(T)+1.0V, VCE=VSS; When VOUT≦0.95V, VCE=VIN=2.0V | 8 |
| Line Regulation | ΔVOUT/(ΔVIN･VOUT) | | 0.01 | 0.2 | %/V | VOUT(T)+1.0V≦VIN≦10V; When VOUT≦0.95V, 2.0V≦VIN≦10V; IOUT=30mA; When VOUT≦1.75V, IOUT=10mA | 8 |
| Input Voltage | VIN | 2 | | 10 | V | | 8 |
| CE "H" Level Voltage | VCEH | | 1.6 | | V | | 8 |
| CE "L" Level Voltage | VCEL | | | 0.25 | V | | 8 |
| CE "H" Level Current (Type F) | ICEH | -0.1 | | 0.1 | μA | VIN=VCE=VOUT(T)+1.0V; When VOUT≦0.95V, VIN=VCE=2.0V | 8 |
| CE "L" Level Current | ICEL | -0.1 | | 0.1 | μA | VIN=VOUT(T)+1.0V, VCE=VSS; When VOUT≦0.95V, VIN=2.0V | 8 |
| Input Voltage | VIN | | | 12 | V | Ta=25℃ | 5 |
| Output Current | IOUT | | | 500 | mA | *1: IOUT≦Pd/(VIN-VOUT) | 5 |
| Power Dissipation (SOT-25) | Pd | | | 250 | mW | SOT-25 | 5 |
| Power Dissipation (SOT-25, PCB mounted) | Pd | | | 600 | mW | SOT-25, PCB mounted (*2) | 5 |
| Operating Ambient Temperature | Topr | -40 | | 85 | ℃ | | 5 |
| Storage Temperature | Tstg | -55 | | 125 | ℃ | | 5 |
| Output Capacitor (CL) recommended value | CL | 1 | | | μF | Ceramic output capacitor connected close to VOUT and VSS pins | 13 |
| Thermal Resistance (SOT-25, board mount) | θJA | | 166.67 | | ℃/W | Board mount, 40×40mm FR-4 1.6mm, Cu 50%, natural convection | 25 |
## CAD (KiCad official)
- Symbol: `XC6209F182MR-G`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files: `xc6209f182mr-g-etched.step` / `xc6209f182mr-g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xc6209f182mr-g.step` / `xc6209f182mr-g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Torex Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589785116634882048) (31 pp, sha256 `575dcb9916c5c35f`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/xc6209f182mr-g-datasheet.pdf)