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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs xc6206p332mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json xc6206p332mr-g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md xc6206p332mr-g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
xc6206p332mr-g-etched.fit.json xc6206p332mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
xc6206p332mr-g-etched.glb xc6206p332mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
xc6206p332mr-g-etched.step xc6206p332mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
xc6206p332mr-g.glb Publish 0.1.0 · Ray
xc6206p332mr-g.kicad_mod Publish 0.1.0 · Ray
xc6206p332mr-g.kicad_sym Publish 0.1.0 · Ray
xc6206p332mr-g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
xc6206p332mr-g.step Publish 0.1.0 · Ray

XC6206P332MR-G

Torex Semicon · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

XC6206P332MR-G from Torex Semicon, in a SOT-23-3L. Pinout and pin descriptions extracted from the datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground reference for the regulator. Return path for both input and output currents.
2 VOUT power_out Regulated 3.3V output pin (±2% accuracy above 2.0V). Supplies up to 200mA (typ) with 250mV dropout at 100mA. Connect a 1.0µF ceramic capacitor to VSS for stability.
3 VIN power_in Unregulated input voltage supply. Operating range 1.8V to 6.0V (absolute max 7.0V). Bypass with a 1.0µF ceramic capacitor to VSS.

Key specifications

Parameter Value
Manufacturer Torex Semicon
Package SOT-23-3L
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • XC6206P332MR-G
  • XC6206P332MR-GPR
  • XC6206P332MR-GPR-G
  • XC6206P332MR-GDR
  • XC6206P332MR-GDR-G
  • XC6206P332MR-GTH
  • XC6206P332MR-GTH-G
  • XC6206P332MR-GTB
  • XC6206P332MR-GTB-G

CAD (KiCad official)

  • Symbol: XC6206P332MR-G
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)
  • 3D model files: xc6206p332mr-g-etched.step / xc6206p332mr-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xc6206p332mr-g.step / xc6206p332mr-g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
xc6206p332mr-g.step 59 KB You want the bare part, or you mark your own boards.
xc6206p332mr-g-etched.step 2.8 MB You want the part with XC6206P332MR-G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 654 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Torex Semicon datasheet (17 pp, sha256 8fda1e40ea3e7c17, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF