# XC6201P502PR

**TECH PUBLIC** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

XC6201P502PR from TECH PUBLIC, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output voltage pin (5.0V for the 50 option), stable with a 1-10 uF ceramic output capacitor. |
| 2 | GND | power_in | Ground pin. |
| 3 | VIN | power_in | Power input voltage pin, operating input up to 12V (absolute maximum -0.3 to +15V), with a 1-10 uF input capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `XC6201P502PR`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `xc6201p502pr-etched.step` / `xc6201p502pr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xc6201p502pr.step` / `xc6201p502pr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603377984007127040) (7 pp, sha256 `d9b40f6c5bcedf3a`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xc6201p502pr-datasheet.pdf)