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XC6118N24AMR-G
Public Made by Adomby adom
Torex Semicon Monitors & Reset Circuits, SOT-25-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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XC6118N24AMR-G
Torex Semicon · Monitors & Reset Circuits · SOT-25-5
XC6118N24AMR-G from Torex Semicon, in a SOT-25-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | N-channel open-drain output that goes low at detection and needs an external pull-up resistor (e.g. 100kΩ), with absolute maximum VSS-0.3 to 7.0V and 10mA output current. |
| 2 | VSS | power_in | Ground pin. |
| 3 | VIN | power_in | Power supply input with operating range 1.0V to 6.0V and absolute maximum of VSS-0.3 to 7.0V. |
| 4 | VSEN | input | Sense input, separate from the power supply pin so another supply can be monitored, with 0V to 6.0V operating range and absolute maximum VSS-0.3 to 7.0V. |
| 5 | Cd | passive | Delay capacitance pin for an external capacitor that sets the release delay time (tDR = RDELAY×Cd×0.69, RDELAY 2.0MΩ typ.), left open when the delay function is unused, with absolute maximum VSS-0.3 to VIN+0.3V and 5.0mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Torex Semicon |
| Package | SOT-25-5 |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Detect Voltage | VDF | 2.352 | 2.448 | V | VIN=1.0~6.0V, VDF(T)=2.4V | 9 | |
| Hysteresis Width | VHYS | 0.047 | 0.196 | V | VIN=1.0~6.0V, VDF(T)=2.4V | 9 | |
| Operating Voltage | VIN | 1 | 6 | V | VDF(T)=0.8~5.0V | 5 | |
| Detect Voltage Line Regulation | ΔVDF/(ΔVIN・VDF) | -0.1 | 0.1 | %/V | VIN=1.0~6.0V | 5 | |
| Supply Current 1 (VIN=1.0V) | ISS1 | 0.4 | 1 | μA | VSEN=VDF×0.9, VIN=1.0V | 5 | |
| Supply Current 1 (VIN=6.0V) | ISS1 | 0.4 | 1 | μA | VSEN=VDF×0.9, VIN=6.0V | 5 | |
| Supply Current 2 (VIN=1.0V) | ISS2 | 0.8 | 1.6 | μA | VSEN=VDF×1.1, VIN=1.0V | 5 | |
| Supply Current 2 (VIN=6.0V) | ISS2 | 0.9 | 1.8 | μA | VSEN=VDF×1.1, VIN=6.0V | 5 | |
| N-ch Output Current (VIN=1.0V) | IOUT1 | 0.1 | 0.7 | mA | VSEN=0V, VDS=0.5V, VIN=1.0V | 5 | |
| N-ch Output Current (VIN=2.0V) | IOUT1 | 0.8 | 1.6 | mA | VSEN=0V, VDS=0.5V, VIN=2.0V | 5 | |
| N-ch Output Current (VIN=3.0V) | IOUT1 | 1.2 | 2 | mA | VSEN=0V, VDS=0.5V, VIN=3.0V | 5 | |
| N-ch Output Current (VIN=4.0V) | IOUT1 | 1.6 | 2.3 | mA | VSEN=0V, VDS=0.5V, VIN=4.0V | 5 | |
| N-ch Output Current (VIN=5.0V) | IOUT1 | 1.8 | 2.4 | mA | VSEN=0V, VDS=0.5V, VIN=5.0V | 5 | |
| N-ch Output Current (VIN=6.0V) | IOUT1 | 1.9 | 2.5 | mA | VSEN=0V, VDS=0.5V, VIN=6.0V | 5 | |
| N-ch Open Drain Leakage Current | ILEAK | 0.2 | 0.4 | μA | VIN=6.0V, VSEN=6.0V, VOUT=6.0V, Cd: Open | 5 | |
| Temperature Characteristics | ΔVDF/(ΔTopr・VDF) | 100 | ppm/°C | -40°C≦Topr≦85°C, ±100 typ | 5 | ||
| Delay Resistance | RDELAY | 1.6 | 2 | 2.4 | MΩ | VSEN=6.0V, VIN=5.0V, Cd=0V | 5 |
| Delay Capacitance Pin Threshold Voltage (VIN=1.0V) | VTCD | 0.4 | 0.5 | 0.6 | V | VSEN=6.0V, VIN=1.0V | 5 |
| Delay Capacitance Pin Threshold Voltage (VIN=6.0V) | VTCD | 2.9 | 3 | 3.1 | V | VSEN=6.0V, VIN=6.0V | 5 |
| Detect Delay Time | tDF0 | 30 | 230 | μs | VIN=6.0V, VSEN=6.0V→0V, Cd: Open | 5 | |
| Release Delay Time | tDR0 | 30 | 200 | μs | VIN=6.0V, VSEN=0V→6.0V, Cd: Open | 5 | |
| Input Voltage | VIN | -0.3 | 7 | V | VSS-0.3~7.0, Ta=25℃ | 4 | |
| Output Current | IOUT | 10 | mA | Ta=25℃ | 4 | ||
| Output Voltage (N-ch open drain) | VOUT | -0.3 | 7 | V | VSS-0.3~7.0, Ta=25℃ | 4 | |
| Sense Pin Voltage | VSEN | -0.3 | 7 | V | VSS-0.3~7.0, Ta=25℃ | 4 | |
| Delay Capacitance Pin Voltage | VCD | -0.3 | V | VSS-0.3~VIN+0.3, Ta=25℃ | 4 | ||
| Delay Capacitance Pin Current | ICD | 5 | mA | Ta=25℃ | 4 | ||
| Power Dissipation SOT-25 | Pd | 250 | mW | SOT-25, Ta=25℃ | 4 | ||
| Operating Ambient Temperature | Ta | -40 | 85 | °C | 4 | ||
| Storage Temperature | Tstg | -55 | 125 | °C | 4 |
CAD (KiCad official)
- Symbol:
XC6118N24AMR-G - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-25-5 (KiCad packages3D, STEP)
- 3D model files:
xc6118n24amr-g-etched.step/xc6118n24amr-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xc6118n24amr-g.step/xc6118n24amr-g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Torex Semicon datasheet (20 pp, sha256
af598da6ee326c9e, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# XC6118N24AMR-G
**Torex Semicon** · Monitors & Reset Circuits · SOT-25-5
XC6118N24AMR-G from Torex Semicon, in a SOT-25-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | N-channel open-drain output that goes low at detection and needs an external pull-up resistor (e.g. 100kΩ), with absolute maximum VSS-0.3 to 7.0V and 10mA output current. |
| 2 | VSS | power_in | Ground pin. |
| 3 | VIN | power_in | Power supply input with operating range 1.0V to 6.0V and absolute maximum of VSS-0.3 to 7.0V. |
| 4 | VSEN | input | Sense input, separate from the power supply pin so another supply can be monitored, with 0V to 6.0V operating range and absolute maximum VSS-0.3 to 7.0V. |
| 5 | Cd | passive | Delay capacitance pin for an external capacitor that sets the release delay time (tDR = RDELAY×Cd×0.69, RDELAY 2.0MΩ typ.), left open when the delay function is unused, with absolute maximum VSS-0.3 to VIN+0.3V and 5.0mA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Torex Semicon |
| Package | SOT-25-5 |
| Category | Power Management ICs |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Detect Voltage | VDF | 2.352 | | 2.448 | V | VIN=1.0~6.0V, VDF(T)=2.4V | 9 |
| Hysteresis Width | VHYS | 0.047 | | 0.196 | V | VIN=1.0~6.0V, VDF(T)=2.4V | 9 |
| Operating Voltage | VIN | 1 | | 6 | V | VDF(T)=0.8~5.0V | 5 |
| Detect Voltage Line Regulation | ΔVDF/(ΔVIN・VDF) | -0.1 | | 0.1 | %/V | VIN=1.0~6.0V | 5 |
| Supply Current 1 (VIN=1.0V) | ISS1 | | 0.4 | 1 | μA | VSEN=VDF×0.9, VIN=1.0V | 5 |
| Supply Current 1 (VIN=6.0V) | ISS1 | | 0.4 | 1 | μA | VSEN=VDF×0.9, VIN=6.0V | 5 |
| Supply Current 2 (VIN=1.0V) | ISS2 | | 0.8 | 1.6 | μA | VSEN=VDF×1.1, VIN=1.0V | 5 |
| Supply Current 2 (VIN=6.0V) | ISS2 | | 0.9 | 1.8 | μA | VSEN=VDF×1.1, VIN=6.0V | 5 |
| N-ch Output Current (VIN=1.0V) | IOUT1 | 0.1 | | 0.7 | mA | VSEN=0V, VDS=0.5V, VIN=1.0V | 5 |
| N-ch Output Current (VIN=2.0V) | IOUT1 | 0.8 | | 1.6 | mA | VSEN=0V, VDS=0.5V, VIN=2.0V | 5 |
| N-ch Output Current (VIN=3.0V) | IOUT1 | 1.2 | | 2 | mA | VSEN=0V, VDS=0.5V, VIN=3.0V | 5 |
| N-ch Output Current (VIN=4.0V) | IOUT1 | 1.6 | | 2.3 | mA | VSEN=0V, VDS=0.5V, VIN=4.0V | 5 |
| N-ch Output Current (VIN=5.0V) | IOUT1 | 1.8 | | 2.4 | mA | VSEN=0V, VDS=0.5V, VIN=5.0V | 5 |
| N-ch Output Current (VIN=6.0V) | IOUT1 | 1.9 | | 2.5 | mA | VSEN=0V, VDS=0.5V, VIN=6.0V | 5 |
| N-ch Open Drain Leakage Current | ILEAK | | 0.2 | 0.4 | μA | VIN=6.0V, VSEN=6.0V, VOUT=6.0V, Cd: Open | 5 |
| Temperature Characteristics | ΔVDF/(ΔTopr・VDF) | | 100 | | ppm/°C | -40°C≦Topr≦85°C, ±100 typ | 5 |
| Delay Resistance | RDELAY | 1.6 | 2 | 2.4 | MΩ | VSEN=6.0V, VIN=5.0V, Cd=0V | 5 |
| Delay Capacitance Pin Threshold Voltage (VIN=1.0V) | VTCD | 0.4 | 0.5 | 0.6 | V | VSEN=6.0V, VIN=1.0V | 5 |
| Delay Capacitance Pin Threshold Voltage (VIN=6.0V) | VTCD | 2.9 | 3 | 3.1 | V | VSEN=6.0V, VIN=6.0V | 5 |
| Detect Delay Time | tDF0 | | 30 | 230 | μs | VIN=6.0V, VSEN=6.0V→0V, Cd: Open | 5 |
| Release Delay Time | tDR0 | | 30 | 200 | μs | VIN=6.0V, VSEN=0V→6.0V, Cd: Open | 5 |
| Input Voltage | VIN | -0.3 | | 7 | V | VSS-0.3~7.0, Ta=25℃ | 4 |
| Output Current | IOUT | | | 10 | mA | Ta=25℃ | 4 |
| Output Voltage (N-ch open drain) | VOUT | -0.3 | | 7 | V | VSS-0.3~7.0, Ta=25℃ | 4 |
| Sense Pin Voltage | VSEN | -0.3 | | 7 | V | VSS-0.3~7.0, Ta=25℃ | 4 |
| Delay Capacitance Pin Voltage | VCD | -0.3 | | | V | VSS-0.3~VIN+0.3, Ta=25℃ | 4 |
| Delay Capacitance Pin Current | ICD | | | 5 | mA | Ta=25℃ | 4 |
| Power Dissipation SOT-25 | Pd | | | 250 | mW | SOT-25, Ta=25℃ | 4 |
| Operating Ambient Temperature | Ta | -40 | | 85 | °C | | 4 |
| Storage Temperature | Tstg | -55 | | 125 | °C | | 4 |
## CAD (KiCad official)
- Symbol: `XC6118N24AMR-G`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-25-5 (KiCad packages3D, STEP)
- 3D model files: `xc6118n24amr-g-etched.step` / `xc6118n24amr-g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xc6118n24amr-g.step` / `xc6118n24amr-g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Torex Semicon datasheet](docs/xc6118n24amr-g-datasheet.pdf) (20 pp, sha256 `af598da6ee326c9e`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/xc6118n24amr-g-datasheet.pdf)