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XC11665A

Si Change · Analog To Digital Converters (ADC) · SOT-23-6

XC11665A from Si Change, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Power supply input; the VDD supply should be set greater than or equal to the maximum input signal to avoid saturation of codes, and the XC11665A operates from 3.0 V to 4.5 V.
2 GND power_in The ground return for the supply and signals.
3 AIN input Analog input that can range from 0 V to VDD.
4 SCLK input Digital clock input that directly controls the conversion and readout processes.
5 DOUT output Digital data output, with samples clocked out of this pin on the falling edges of SCLK.
6 CS input Chip select; a conversion process begins on the falling edge of CS.

Key specifications

Parameter Value
Manufacturer Si Change
Package SOT-23-6
Category Data Acquisition
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Integral linearity 1 LSB 2
Differential linearity 1 LSB 2
Supply current, normal operation IDD 0.69 1.54 mA fSAMPLE = 1000 KSPS, fSCLK = 16.6 MHz, VDD = 3.3 V; digital inputs = 0 V or VDD 2
Supply current, normal operation IDD 2.17 3.4 mA fSAMPLE = 1000 KSPS, fSCLK = 16.6 MHz, VDD = 4.5 V; digital inputs = 0 V or VDD 2
Supply current, normal operation IDD 0.6 1.28 mA fSAMPLE = 800 KSPS, fSCLK = 16.6 MHz, VDD = 3.3 V; digital inputs = 0 V or VDD 2
Supply current, normal operation IDD 1.8 2.8 mA fSAMPLE = 800 KSPS, fSCLK = 16.6 MHz, VDD = 4.5 V; digital inputs = 0 V or VDD 2
Power dissipation, normal operation 2.3 5.1 mW fSAMPLE = 1000 KSPS, fSCLK = 16.6 MHz, VDD = 3.3 V 2
Power dissipation, normal operation 9.8 15.3 mW fSAMPLE = 1000 KSPS, fSCLK = 16.6 MHz, VDD = 4.5 V 2
Supply voltage VDD 3 4.5 V XC11665A single supply operation 2
Operating temperature range -40 85 °C Guaranteed operation 2
Analog input range AIN 0 V Signal can range from 0 V to VDD (upper limit is VDD, no numeric max printed) 3
Resolution 12 Bits 2
No missing codes 12 Bits 2
Throughput rate fSAMPLE 1 MSPS fSCLK = 16.6 MHz, 3.0 V VDD 4.5 V 2
SNR SNR 72 dB fIN = 100 kHz 2
THD THD -83 dB fIN = 100 kHz 2

CAD (KiCad official)

  • Symbol: XC11665A
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: xc11665a-etched.step / xc11665a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xc11665a.step / xc11665a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Si Change datasheet (5 pp, sha256 d2ca338107e28840, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF