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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	xb5350d0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
viewers	pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray	1mo ago
package.json	Publish 0.2.0 · Ray	1mo ago
pads.json	pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray	1mo ago
page.json	Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray	11d ago
README.md	xb5350d0: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	14d ago
xb5350d0-etched.fit.json	xb5350d0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
xb5350d0-etched.glb	xb5350d0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
xb5350d0-etched.step	xb5350d0: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	4d ago
xb5350d0.glb	Publish 0.1.0 · Ray	1mo ago
xb5350d0.kicad_mod	Publish 0.1.0 · Ray	1mo ago
xb5350d0.kicad_sym	Publish 0.1.0 · Ray	1mo ago
xb5350d0.lbr	rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 5 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray	1mo ago
xb5350d0.step	Publish 0.1.0 · Ray	1mo ago

XB5350D0

XySemi · Battery Management · SOT-23-5

XB5350D0 from XySemi, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VT	unconnected	Test pin for vendor use only; not used by application. Leave unconnected or per typical application circuit.
2	GND	power_in	Ground reference. Connect to the negative terminal of the battery cell.
3	VDD	power_in	Power supply input. Absolute max -0.3 to 6 V. Bypass to GND with a 0.1 µF capacitor via a 100 Ω series resistor per the typical application circuit.
4	VM	power_out	Negative terminal of the battery pack (charger-/load- return). Internal integrated FET switch connects this terminal to GND during normal operation. Absolute max -6 to 10 V.
5	VM	power_out	Negative terminal of the battery pack (charger-/load- return). Internal integrated FET switch connects this terminal to GND during normal operation. Absolute max -6 to 10 V.

Key specifications

Parameter	Value
Manufacturer	XySemi
Package	SOT-23-5
Category	PMIC
Pins	5

CAD (KiCad official)

Symbol: XB5350D0
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5 (KiCad packages3D, STEP)
3D model files: xb5350d0-etched.step / xb5350d0-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xb5350d0.step / xb5350d0.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`xb5350d0.step`	85 KB	You want the bare part, or you mark your own boards.
`xb5350d0-etched.step`	1.9 MB	You want the part with `XB5350D0` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 461 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XySemi datasheet (12 pp, sha256 cdac108845178483, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF