component
X5323S8IZ-2.7A
Public Made by Adomby adom
RENESAS Monitors & Reset Circuits, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 6h ago |
| viewers | 6h ago |
| package.json | 6h ago |
| page.json | 6h ago |
| README.md | 6h ago |
| x5323s8iz-2-7a-etched.glb | 6h ago |
| x5323s8iz-2-7a-etched.step | 6h ago |
| x5323s8iz-2-7a-hero.glb | 6h ago |
| x5323s8iz-2-7a-hero.overlay.json | 6h ago |
| x5323s8iz-2-7a.glb | 6h ago |
| x5323s8iz-2-7a.kicad_mod | 6h ago |
| x5323s8iz-2-7a.kicad_sym | 6h ago |
| x5323s8iz-2-7a.lbr | 6h ago |
| x5323s8iz-2-7a.step | 6h ago |
X5323S8IZ-2.7A
RENESAS · Monitors & Reset Circuits · SOIC-8
X5323S8IZ-2.7A from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS/WDI | input | Chip select input where CS LOW enables the device and HIGH deselects it, doubling as the watchdog input where a HIGH to LOW transition restarts the watchdog timer. |
| 2 | SO | output | Push/pull serial data output that shifts data out on read cycles, clocked by the falling edge of SCK, and is high impedance when CS is HIGH. |
| 3 | WP | input | Write protect input that works with the nonvolatile WPEN bit to lock the watchdog timer control and memory write protect bits. |
| 4 | VSS | power_in | Ground reference for the device. |
| 5 | SI | input | Serial data input where opcodes, byte addresses and memory data are latched on the rising edge of SCK, MSB first. |
| 6 | SCK | input | Serial clock that latches SI data on its rising edge and changes SO data on its falling edge, with a maximum clock frequency of 2 MHz. |
| 7 | RESET/RESET | output | Open drain reset output that goes active when VCC falls below the minimum VCC sense level and stays active until VCC rises above it for 200ms. |
| 8 | VCC | power_in | Supply voltage of 2.7V to 5.5V for this part. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Power Supply Chip |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reset Trip Point Voltage, X5323-2.7A, X5325-2.7A | VTRIP | 2.85 | 2.92 | 3 | V | 13 | |
| VCC Write Current (active) | ICC1 | 5 | mA | SCK = VCC x 0.1/VCC x 0.9 @ 2MHz, SO = Open | 10 | ||
| VCC Read Current (active) | ICC2 | 0.4 | mA | SCK = VCC x 0.1/VCC x 0.9 @ 2MHz, SO = Open | 10 | ||
| VCC Standby Current WDT = OFF | ISB1 | 1 | µA | CS = VCC, VIN = VSS or VCC, VCC = 5.5V | 10 | ||
| VCC Standby Current WDT = ON | ISB2 | 50 | µA | CS = VCC, VIN = VSS or VCC, VCC = 5.5V | 10 | ||
| VCC Standby Current WDT = ON | ISB3 | 20 | µA | CS = VCC, VIN = VSS or VCC, VCC =3.6V | 10 | ||
| Input Leakage Current | ILI | 0.1 | 10 | µA | VIN = VSS to VCC | 10 | |
| Output Leakage Current | ILO | 0.1 | 10 | µA | VOUT = VSS to VCC | 10 | |
| Input LOW Voltage | VIL | -0.5 | V | (Note 1) | 10 | ||
| Output LOW Voltage | VOL1 | 0.4 | V | VCC > 3.3V, IOL = 2.1mA | 10 | ||
| Reset Output LOW Voltage | VOLS | 0.4 | V | IOL = 1mA | 10 | ||
| Output Capacitance (SO, RESET/RESET) | COUT | 8 | pF | VOUT = 0V | 10 | ||
| Input Capacitance (SCK, SI, CS, WP) | CIN | 6 | pF | VIN = 0V | 10 | ||
| VTRIP Hysteresis (HIGH to LOW vs LOW to HIGH VTRIP Voltage) | VTH | 20 | mV | 13 | |||
| Supply Voltage Range | VCC | 2.7 | 5.5 | V | 10 | ||
| Temperature Range (Industrial) | -40 | 85 | °C | 10 | |||
| Voltage on any Pin with Respect to VSS | -1 | 7 | V | 10 | |||
| DC Output Current | 5 | mA | 10 | ||||
| Storage Temperature | -65 | 150 | °C | 10 | |||
| Temperature Under Bias | -65 | 135 | °C | 10 | |||
| Clock Frequency (serial input) | fSCK | 0 | 2 | MHz | 2.7 TO 5.5V | 11 | |
| Cycle Time | tCYC | 500 | ns | 2.7 TO 5.5V | 11 | ||
| CS Lead Time | tLEAD | 250 | ns | 2.7 TO 5.5V | 11 | ||
| CS Lag Time | tLAG | 250 | ns | 2.7 TO 5.5V | 11 | ||
| Clock HIGH Time | tWH | 200 | ns | 2.7 TO 5.5V | 11 | ||
| Clock LOW Time | tWL | 250 | ns | 2.7 TO 5.5V | 11 | ||
| Data Set-up Time | tSU | 50 | ns | 2.7 TO 5.5V | 11 | ||
| Data Hold Time | tH | 50 | ns | 2.7 TO 5.5V | 11 | ||
| Input Rise Time | tRI | 100 | ns | 2.7 TO 5.5V, Note 3 | 11 | ||
| Input Fall Time | tFI | 100 | ns | 2.7 TO 5.5V, Note 3 | 11 | ||
| CS Deselect Time | tCS | 500 | ns | 2.7 TO 5.5V | 11 | ||
| Write Cycle Time | tWC | 10 | ms | Note 4 | 11 | ||
| Output Disable Time | tDIS | 250 | ns | 2.7 TO 5.5V | 12 | ||
| Output Valid From Clock Low | tV | 250 | ns | 2.7 TO 5.5V | 12 | ||
| Output Hold Time | tHO | 0 | ns | 2.7 TO 5.5V | 12 | ||
| Output Rise Time | tRO | 100 | ns | 2.7 TO 5.5V, Note 3 | 12 | ||
| Output Fall Time | tFO | 100 | ns | 2.7 TO 5.5V, Note 3 | 12 | ||
| Power-up Reset Time-Out | tPURST | 100 | 200 | 280 | ms | 13 | |
| VCC Detect To Reset/Output | tRPD | 500 | ns | Note 5 | 13 | ||
| VCC Fall Time | tF | 100 | µs | Note 5 | 13 | ||
| VCC Rise Time | tR | 100 | µs | Note 5 | 13 | ||
| Watchdog Time-Out Period | tWDO | 100 | 200 | 300 | ms | WD1 = 1, WD0 = 0 | 13 |
| Watchdog Time-Out Period | tWDO | 450 | 600 | 800 | ms | WD1 = 0, WD0 = 1 | 13 |
| Watchdog Time-Out Period | tWDO | 1 | 1.4 | 2 | s | WD1 = 0, WD0 = 0 | 13 |
| Reset Time-Out | tRST | 100 | 200 | 300 | ms | 13 | |
| VP Programming Voltage | VP | 15 | 18 | V | 15 | ||
| VTRIP Programed Voltage Range | VTRAN | 1.7 | 5 | V | 15 | ||
| Initial VTRIP Program Voltage Accuracy (VCC Applied-VTRIP) | Vta1 | -0.1 | 0.4 | V | Programmed at +25°C | 15 | |
| Subsequent VTRIP Program Voltage Accuracy [(VCC Applied-Vta1)-VTRIP] | Vta2 | -25 | 25 | mV | Programmed at +25°C | 15 | |
| VTRIP Program Voltage Repeatability | Vtr | -25 | 25 | mV | Successive Program Operations; Programmed at +25°C | 15 | |
| VTRIP Program Variation After Programming | Vtv | -25 | 25 | mV | 0°C to +75°C; Programmed at +25°C | 15 |
CAD (KiCad official)
- Symbol:
X5323S8IZ-2.7A - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
x5323s8iz-2-7a-etched.step/x5323s8iz-2-7a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);x5323s8iz-2-7a.step/x5323s8iz-2-7a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (19 pp, sha256
0edda782d5b4b614, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).