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Wurth 171010501

Wurth Elektronik 171010501 adjustable 1 A buck micromodule. Input 2.5 to 5.5 V, output 0.8 to 5.5 V subject to input/headroom limits. LGA-6EP body nominally 3.2 x 2.5 x 1.55 mm. Six terminals plus the exposed ground pad give seven pin/pad identities.

Candidate, not a qualified circuit or manufacturing release. Manufacturer originals and a canonical library are available. Setpoints, external components, transient and thermal performance require application-specific design; model mounting and native parity remain under review.

Manufacturer sources

  • Official datasheet, v3.0, September 2024, retained as original bytes.
  • Catalog and CAD downloads: rev26d KiCad archive and direct STEP. Both catalog and KiCad-paired STEP originals are retained and hashed in provenance.json.
  • The symbol is the exact manufacturer entry split from the family library. The footprint is original. The canonical adom-lbr import normalizes metadata and its relative model path.
  • The 3D reference view uses the detailed standalone manufacturer STEP. The original KiCad-paired STEP remains available with the native library; both original files are preserved. Canonical KiCad exports are in canonical-export/.

Pin mapping

Pin Function
1 VOUT
2 PG, open-drain power-good
3 FB
4 VIN
5 EN
6 PGND
EP Exposed ground pad

The manufacturer footprint has a pin-1 silk corner and explicit zero-offset/unit-scale model transform. OCCT reports pin-1 unknown; this is not a passed orientation check. Verify actual body/contact/pin-1 alignment in webview and native tools. The grouped symbol includes a central manufacturer-derived chip outline. Preserve original physical geometry when adding virtual model markings.

Datasheet discrepancies

PG information is inconsistent: page 4 describes 95/105 percent; page 8 gives 95 percent typical; page 21 describes 90/120 percent behavior. These do not establish a guaranteed precision rail-good window. Use a separately justified monitor if needed. PG absolute voltage is limited relative to VIN; check its pull-up domain during power-down.

The page 27 BOM lists 49.9 kohm for the 1.8 V example, whereas the feedback formula and page 8 table specify 80.6 kohm with a 100 kohm top resistor. Compute the intended voltage with tolerances and measure on hardware; do not blindly copy that BOM.

The integrated input capacitor does not replace the required external input capacitor. Output/feed-forward capacitors, thermal layout and copper/vias require qualification against the actual InstaPCB process.

Purchasing evidence

Parts Search on 9 September 2026 returned Mouser 710-171010501, 10,004 in stock, $5.19 at quantity 1, with a 245-day lead-time field. DigiKey listed the exact part at $5.1900 and stock 917; its evaluation-board result is a different MPN. sourcing.json retains the snapshot. Mouser is preferred, stock is not reserved, and delivery is unconfirmed.

Validation status

Seven canonical pin/pad identities agree with the manufacturer source. STEP-to-GLB conversion completed. Feature bounds including OCCT tolerance are approximately 3.2124 x 2.5124 x 1.5624 mm; this does not certify pad seating. Native KiCad/Fusion/Altium read-back, virtual model markings, electrical qualification and manufacturing release remain pending.

Canonical-derived exports now include 171010501.lbr (local complete-deviceset validation passed) and exports/altium/171010501.SchLib plus .PcbLib (seven pins and pads). This is export evidence, not native application parity. Interactive wiki viewers are available for library inspection.

TMF8829 Depth Lab uses this component. Its circuit choices and project progress are documented there.

3D reference view

The standalone Würth STEP includes six outer contacts and four central ground-contact sections. The STEP in Würth’s KiCad archive is a single solid with a flat underside, omitting those separate contacts. The display now uses the detailed standalone source; this is a source-selection correction, not invented terminal geometry. 171010501-contact-source-review.json records both source hashes and the inspected geometry.

The model is rotated 180 degrees about Z to follow the manufacturer KiCad footprint’s orientation. Separate nonphysical artwork shows teal dashed copper-pad boundaries at 50% opacity, actual signal names at 50% opacity, and silkscreen contours at 30% opacity. Orbit underneath to inspect the physical contacts and footprint together. Copper boundaries are not mask/paste apertures. Native-library model replacement and pin-1/seating qualification remain separate open checks. The original STEP files are unchanged; the display now includes a virtual MPN inlay.

MPN marking, source and license

Mark location: Clear edge of the IC top at source y=-0.83 mm, away from central RCA marking, dot and taller discrete capacitor. The exact MPN is a virtual identification inlay generated by adom-chip-laser, not a claim about the manufacturer’s actual package marking. The physical source model and reference-artwork geometry remain unchanged.

The Source field links to the manufacturer/reference authority. Generation tools such as adom-lbr, adom-symbol, step2glb and Adom Chip Laser are recorded separately in artifact provenance. Original Adom-authored content defaults to the MIT open-source license; manufacturer and upstream assets retain their original terms and attribution. See license scope. Native CAD parity and manufacturing qualification are separate checks.

Cached chip artwork

These reusable chip previews and symbol outlines retain the reviewed Z-up pose and virtual MPN placement. Read the manifest before generating new artwork; compare its source hashes before reuse. Electrical and native model-seating qualification remain separate.

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Cache manifest and generation recipe · Original manufacturer STEP

Component LODs

Four board-use detail levels preserve the reviewed Z-up pose and real package terminals. High and medium retain the virtual MPN in its reviewed location. All four exclude the footprint outlines, pad labels and silkscreen used by the separate annotated wiki hero; the EDA board supplies those layers.

Cached PNG/WebP previews show each level without starting another 3D viewer. Choose Turn on 3D preview to inspect zoom-driven detail changes. Closing or hiding that preview releases its models and viewer resources. The manifest records source hashes, geometry estimates and review limits; display fidelity does not establish native seating or manufacturing qualification.

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LOD manifest and reuse contract

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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