WST2011

Winsok Semicon · MOSFETs · SOT-23-6L

WST2011 from Winsok Semicon, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	G1	input	Gate of P-channel MOSFET 1, with VGS rated ±12 V and VGS(th) of -0.5 to -1.5 V at ID=-250uA.
2	S2	passive	Source of P-channel MOSFET 2, with continuous drain current of -3.2 A steady state at TA=25℃.
3	G2	input	Gate of P-channel MOSFET 2, with VGS rated ±12 V and VGS(th) of -0.5 to -1.5 V at ID=-250uA.
4	D2	passive	Drain of P-channel MOSFET 2, with VDS rated -20 V and pulsed drain current of -12 A.
5	S1	passive	Source of P-channel MOSFET 1, with continuous drain current of -3.2 A steady state at TA=25℃.
6	D1	passive	Drain of P-channel MOSFET 1, with VDS rated -20 V and pulsed drain current of -12 A.

Key specifications

Parameter	Value
Manufacturer	Winsok Semicon
Package	SOT-23-6L
Category	Transistors/Thyristors
Pins	6

CAD (KiCad official)

Symbol: WST2011
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: SOT-23-6L (KiCad packages3D, STEP)
3D model files: wst2011-etched.step / wst2011-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); wst2011.step / wst2011.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Winsok Semicon datasheet (5 pp, sha256 06c6759ee03c30cd, retrieved 2026-10-09, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# WST2011

**Winsok Semicon** · MOSFETs · SOT-23-6L

WST2011 from Winsok Semicon, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | input | Gate of P-channel MOSFET 1, with VGS rated ±12 V and VGS(th) of -0.5 to -1.5 V at ID=-250uA. |
| 2 | S2 | passive | Source of P-channel MOSFET 2, with continuous drain current of -3.2 A steady state at TA=25℃. |
| 3 | G2 | input | Gate of P-channel MOSFET 2, with VGS rated ±12 V and VGS(th) of -0.5 to -1.5 V at ID=-250uA. |
| 4 | D2 | passive | Drain of P-channel MOSFET 2, with VDS rated -20 V and pulsed drain current of -12 A. |
| 5 | S1 | passive | Source of P-channel MOSFET 1, with continuous drain current of -3.2 A steady state at TA=25℃. |
| 6 | D1 | passive | Drain of P-channel MOSFET 1, with VDS rated -20 V and pulsed drain current of -12 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | SOT-23-6L |
| Category | Transistors/Thyristors |
| Pins | 6 |

## CAD (KiCad official)

- Symbol: `WST2011`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `wst2011-etched.step` / `wst2011-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wst2011.step` / `wst2011.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Winsok Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586202457164275712) (5 pp, sha256 `06c6759ee03c30cd`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/wst2011-datasheet.pdf)