component
WSP6024
Public Made by Adomby adom
Winsok Semicon MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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WSP6024
Winsok Semicon · MOSFETs · SOP-8
WSP6024 from Winsok Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, connected to pins 2 and 3; the diagram shows pins 1-3 as S. |
| 2 | S | passive | Source of the N-channel MOSFET, connected to pins 1 and 3. |
| 3 | S | passive | Source of the N-channel MOSFET, connected to pins 1 and 2. |
| 4 | G | input | Gate of the N-channel MOSFET, rated at ±20 V gate-source maximum with a typical threshold of 2.0 V. |
| 5 | D | passive | Drain of the N-channel MOSFET, connected to pins 6, 7 and 8; the drain-source rating is 60 V and the continuous current is 15 A at TC=25℃. |
| 6 | D | passive | Drain of the N-channel MOSFET, connected to pins 5, 7 and 8; the drain-source rating is 60 V. |
| 7 | D | passive | Drain of the N-channel MOSFET, connected to pins 5, 6 and 8; the drain-source rating is 60 V. |
| 8 | D | passive | Drain of the N-channel MOSFET, connected to pins 5, 6 and 7; the drain-source rating is 60 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 60 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID@TC=25℃ | 15 | A | VGS @ 10V, TC=25℃ | 1 | ||
| Continuous Drain Current | ID@TC=70℃ | 9.6 | A | VGS @ 10V, TC=70℃ | 1 | ||
| Pulsed Drain Current | IDM | 43 | A | Pulse width limited by max. junction temperature | 1 | ||
| Single Pulse Avalanche Energy | EAS | 81 | mJ | UIS tested, pulse width limited by max. junction temperature 150℃ (initial Tj=25℃) | 1 | ||
| Avalanche Current | IAS | 16 | A | UIS tested, pulse width limited by max. junction temperature 150℃ (initial Tj=25℃) | 1 | ||
| Total Power Dissipation | PD@TA=25℃ | 1.78 | W | TA=25℃ | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | 150 | ℃ | 1 | |||
| Thermal Resistance Junction-ambient | RθJA | 72 | ℃/W | Surface mounted on 1in2 pad area (note c) | 1 | ||
| Thermal Resistance Junction-Case | RθJC | 1.2 | ℃/W | 1 | |||
| Drain-Source Breakdown Voltage | BVDSS | 60 | V | VGS=0V, ID=250uA | 2 | ||
| Static Drain-Source On-Resistance | RDS(ON) | 8 | 10 | mΩ | VGS=10V, ID=13A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 11 | 13.7 | mΩ | VGS=4.5V, ID=8A | 2 | |
| Gate Threshold Voltage | VGS(th) | 1 | 2 | 3 | V | VGS=VDS, ID=250uA | 2 |
| Drain-Source Leakage Current | IDSS | 1 | uA | VDS=60V, VGS=0V, TJ=25℃ | 2 | ||
| Drain-Source Leakage Current | IDSS | 100 | uA | VDS=60V, VGS=0V, TJ=55℃ | 2 | ||
| Gate-Source Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Diode Forward Voltage | VSD | 1.3 | V | VGS=0V, IS=1A, TJ=25℃ | 2 |
CAD (KiCad official)
- Symbol:
WSP6024 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
wsp6024-etched.step/wsp6024-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);wsp6024.step/wsp6024.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Winsok Semicon datasheet (8 pp, sha256
434cdc0a39637256, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# WSP6024
**Winsok Semicon** · MOSFETs · SOP-8
WSP6024 from Winsok Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the N-channel MOSFET, connected to pins 2 and 3; the diagram shows pins 1-3 as S. |
| 2 | S | passive | Source of the N-channel MOSFET, connected to pins 1 and 3. |
| 3 | S | passive | Source of the N-channel MOSFET, connected to pins 1 and 2. |
| 4 | G | input | Gate of the N-channel MOSFET, rated at ±20 V gate-source maximum with a typical threshold of 2.0 V. |
| 5 | D | passive | Drain of the N-channel MOSFET, connected to pins 6, 7 and 8; the drain-source rating is 60 V and the continuous current is 15 A at TC=25℃. |
| 6 | D | passive | Drain of the N-channel MOSFET, connected to pins 5, 7 and 8; the drain-source rating is 60 V. |
| 7 | D | passive | Drain of the N-channel MOSFET, connected to pins 5, 6 and 8; the drain-source rating is 60 V. |
| 8 | D | passive | Drain of the N-channel MOSFET, connected to pins 5, 6 and 7; the drain-source rating is 60 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | 60 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID@TC=25℃ | | | 15 | A | VGS @ 10V, TC=25℃ | 1 |
| Continuous Drain Current | ID@TC=70℃ | | | 9.6 | A | VGS @ 10V, TC=70℃ | 1 |
| Pulsed Drain Current | IDM | | | 43 | A | Pulse width limited by max. junction temperature | 1 |
| Single Pulse Avalanche Energy | EAS | | | 81 | mJ | UIS tested, pulse width limited by max. junction temperature 150℃ (initial Tj=25℃) | 1 |
| Avalanche Current | IAS | | | 16 | A | UIS tested, pulse width limited by max. junction temperature 150℃ (initial Tj=25℃) | 1 |
| Total Power Dissipation | PD@TA=25℃ | | | 1.78 | W | TA=25℃ | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | | | 150 | ℃ | | 1 |
| Thermal Resistance Junction-ambient | RθJA | | | 72 | ℃/W | Surface mounted on 1in2 pad area (note c) | 1 |
| Thermal Resistance Junction-Case | RθJC | | | 1.2 | ℃/W | | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 60 | | | V | VGS=0V, ID=250uA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 8 | 10 | mΩ | VGS=10V, ID=13A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 11 | 13.7 | mΩ | VGS=4.5V, ID=8A | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | 2 | 3 | V | VGS=VDS, ID=250uA | 2 |
| Drain-Source Leakage Current | IDSS | | | 1 | uA | VDS=60V, VGS=0V, TJ=25℃ | 2 |
| Drain-Source Leakage Current | IDSS | | | 100 | uA | VDS=60V, VGS=0V, TJ=55℃ | 2 |
| Gate-Source Leakage Current | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Diode Forward Voltage | VSD | | | 1.3 | V | VGS=0V, IS=1A, TJ=25℃ | 2 |
## CAD (KiCad official)
- Symbol: `WSP6024`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `wsp6024-etched.step` / `wsp6024-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wsp6024.step` / `wsp6024.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Winsok Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907486920892416) (8 pp, sha256 `434cdc0a39637256`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/wsp6024-datasheet.pdf)